STE2007_06 Datasheet, PDF (29/62 Pages) STMicroelectronics – 96 x 68 Single-chip LCD controller/driver

STE2007
Display Data RAM (DDRAM)
5.2
Figure 23. Column address in reversed mode
95 94
191 190
287 286
383 382
479 478
575 574
671 670
767 766
863 862
5FH 5EH
Data for page address 0H to 07H
0H
98 97 ⁹⁶ 1H
194 193 192 2H
290 289 288 3H
386 385 384 4H
482 481 480 5H
578 577 576 6H
674 673 672 7H
770 769 768 8H
Data
D0 LSBit
D1
D2
D3
D4
D5
D6
D7 MSBit
Page address
02H 01H 00H
Column address
D0
D1
D2
D3
Data for page address 8H
Data can be written to the DDRAM at the same time as data is being displayed, without
causing the LCD to flicker.
Segment driver direction command can be used to reverse the relationship between the
DDRAM column address and segment output. This function is achieved writing data into
DDRAM in reverse order (from Right to left).
Table 16.
Column
address
Normal
Direction
Reverse
Direction
Column address direction
00H 01H
02H
SEG0
SEG1
SEG2
SEG95 SEG94 SEG93
5DH
______
______
5EH
SEG93
SEG2
5FH
SEG94
SEG1
5DH
SEG95
SEG0
Line address circuit
The line address circuit specifies the line address relating to the COM output when the
contents of the DDRAM are displayed. The display start line that is normally the top line of
the display, can be specified by Display start line address set command.
STE2007 features Four different Multiplexing Mode to fine tune the duty ratio on the display
size:
– 68 Lines Display
– 65 Lines Display
– 49 Lines Display
– 33 Lines Display
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