STCD1020_10 Datasheet, PDF (28/40 Pages) STMicroelectronics – Multichannel clock distribution circuit

Typical operating characteristics
STCD1020, STCD1030, STCD1040
Figure 31. STCD10x0 buffer recovery time from off to on (STCD1040, 1.8 V version,
EN2 =EN3=EN4=1, measure CLK1 when EN1 from 0 to 1)
Figure 32. Sine wave input clock vs. output clock (STCD1040, 1.8 V version, 26 MHz
sine wave master clock input from TCXO)
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Doc ID 13823 Rev 6