8169 Datasheet, PDF (28/30 Pages) STMicroelectronics – DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX™

STA304A
12.16BIST and Status Register (BASR) : add. 76h
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
DSP_BIS DSP_BIS DSP_BIS DSP_RA X
T_Start T_Running T_Stop M
X SRC_SP SRC_SP DDX_DP DDX_SP DDX_SP DDX_SP BIST_St BIST_St SPDIF_ SRC_St
RAM_2 RAM_1 RAM RAM_3 RAM_2 RAM_1 op
art Status atus
BIT I/F DSP RST
NAME
DESCRIPTION
0
R
1
SRC_Status
When 0, the digital pll in the SRC is LOCKED. When 1 the digital
PLL is OUT of LOCK.
1
R
1
SPDIF_Status
When 1, the SPDIF interface is out of lock. When 0 the interface
is locked to the SPDIF stream input.
2 WR0
BIST_Start
Reserved
3
R
0
BIST_Stop
Reserved
4
R
0
DDX_SPRAM_1 Reserved
5
R
0
DDX_SPRAM_2 Reserved
6
R
0
DDX_SPRAM_3 Reserved
7
R
0
DDX_DPRAM
Reserved
8
R
0
SRC_SPRAM_1 Reserved
9
R
0
SRC_SPRAM_2 Reserved
10 R/W
1
AC3_AMEN
Enable automuting if AC3 frame header found
11 R/W
0
CH1_AMEN
Enable automuting if no CH1_STATUS bit found
12 R
R
0
DSP_RAM
Reserved
13 R
R
0
DSP_BIST_Stop Reserved
14 R
R 0 DSP_BIST_Running Reserved
15 W R 0
DSP_BIST_Start Reserved
12.17Coefficients Handling Registers (add. 78h – 7Ah)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 C0
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 R/W
C19 C18 C17 C16
See paragraph 10.
12.18Vendor ID Registers (add. 7Ch – 7Eh)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0100000101001
1
0
0
0 1 0 0 1 0 1 0 REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0
These registers are specific vendor identification for the STA304A. The Microsoft’s Plug and Play Vendor ID code is "ALJ". The
REV7.. 0 field is for the Vendor Revision number. These are read only registers, any write request to one of these will be ignored.
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