STM32F205VCT6TR Datasheet, PDF (26/178 Pages) STMicroelectronics – ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM

Functional overview
Figure 7. Regulator OFF/internal reset OFF
VDD 1.2 V
External VDD/VCAP_1/2
power supply supervisor
Ext. reset controller active
when VDD<1.7V and
VCAP_1/2 < 1.08 V
VDD
STM32F20xxx
PA0 NRST
REGOFF IRROFF
1.2 V
VCAP_1
VCAP_2
ai18477b
The following conditions must be respected:
• V_DD should always be higher than V_{CAP_1} and V_{CAP_2} to avoid current injection
between power domains (see Figure 8).
• PA0 should be kept low to cover both conditions: until V_{CAP_1} and V_{CAP_2} reach 1.08 V,
and until V_DD reaches 1.7 V.
• NRST should be controlled by an external reset controller to keep the device under
reset when V_DD is below 1.7 V (see Figure 9).
In this mode, when the internal reset is OFF, the following integrated features are no more
supported:
• The integrated power-on reset (POR) / power-down reset (PDR) circuitry is disabled.
• The brownout reset (BOR) circuitry is disabled.
• The embedded programmable voltage detector (PVD) is disabled.
• V_BAT functionality is no more available and V_BAT pin should be connected to VDD.
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DocID15818 Rev 11