TDA7505 Datasheet, PDF (24/38 Pages) STMicroelectronics – Car radio DSP for advanced signal processing

Electrical specifications
Figure 12. Debug port read timing
DBCK
(input)
(7)
DBOUT
(output)
Note:
1 High Impedance, external pull-down resistor
TDA7505
(Last)
(8)
(Note 1)
(12)
D02AU1369
Figure 13. Debug port DBCK next command after read register timing
DBCK
(input)
(11)
(NEXT COMMAND)
D02AU1370
Table 20. ASRC
Symbol
Parameters
Test conditions
THD+N
Total harmonic distortion +
noise, unweighted,
Fsin / Fsout = 0.82
(36 kHz → 44.1 kHz)
Dynamic range,
DR
A-weighted, dithered input,
Fsin / Fsout = 0.82
(36 kHz → 44.1 kHz)
IPD Interchannel phase deviation
Input sample rate range
Input sample rate
Output sample rate range
20 Hz–20 kHz, full scale, 16 bit inp.
20 Hz–20 kHz, Full scale, 20 bit inp.
1 kHz, full scale, 16 bit inp.
15 kHz, full scale, 16 bit inp.
1 kHz, full scale, 20 bit inp.
15 kHz, full scale, 20 bit inp.
1 kHz, -60 dB, 16 bit inp.
1 kHz, -60 dB, 16 bit inp.
No input signal decimation
Input signal decimation by 2
Digital filter
f_p Passband Frequency
R_p Passband Ripple
0–0.4110 Fsin
f_s Stopband Corner Frequency
R_s Stopband Attenuation
@ f_s
min typ max Unit
-95
dB
-98
dB
-95
dB
-95
dB
-105
dB
-98
dB
98
dB
120
dB
0 deg
32
48 kHz
96
kHz
32
48 kHz
0.4110
Fsin
-0.01
+0.01 dB
0.5510
Fsin
-120
dB
Table 21. Fractional-N PLL
Symbol
Parameter
f_VCO VCO output frequency
Test condition
Min.
130
Typ.
Max.
310
Unit
MHz
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