TDA7505 Datasheet, PDF (22/38 Pages) STMicroelectronics – Car radio DSP for advanced signal processing

Electrical specifications
TDA7505
Table 15. I²C Timing (continued)
Symbol
Parameter
t_F
t_SU;STO
t_SU:DAT
C_b
Fall time of both SDA and SCL
signals
Set-up time for STOP condition
Data set-up time
Capacitive load for each bus line
Test
condition
Standard mode
I²C bus
Fast mode I²C bus
Unit
Min. Max.
Min.
Max.
Cb in pF
–
300 20+0.1Cb 300 ns
4
–
0.6
–
ms
250
–
100
–
ns
–
400
–
400 pF
4.10 DRAM/SRAM interface (EMI)
Table 16. DRAM timing
Symbol
Parameter
T_acc0
T_acc0
T_acc1
T_acc1
Fast DRAM access time
Fast DRAM access time
Slow DRAM access time
Slow DRAM access time
Test condition
EDTM=0, 16 bit word
EDTM=0, 24 bit word
EDTM=1, 16 bit word
EDTM=1, 24 bit word
Table 17. DRAM refresh period
Symbol
Parameter
T_ref DRAM refresh period
Test condition
Table 18. SRAM Timing
Symbol
Parameter
T_acc SRAM access time
Test condition
Min.
Typ.
17
23
24
32
Max.
Unit
T_dsp
T_dsp
T_dsp
T_dsp
Min.
469
Typ.
Max.
782
Unit
T_dsp
Min.
2
Typ.
Max.
9
Unit
T_dsp
4.11
Debug port interface
Table 19. Debug port interface
No.
Characteristics (Fdsp = 75MHz)
1 DBCK rise time
2 DBCK fall time
3 DBCK low
4 DBCK high
5 DBCK cycle time
6 DBRQN asserted to DBOUT (ACK) asserted
7 DBCK high to DBOUT valid
Min.
40
40
200
5*T_DSP
Max.
Unit
2
ns
2
ns
ns
ns
ns
ns
40
ns
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