STM32F446XC Datasheet, PDF(23/202 Page) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 512kB Flash/128+4KB RAM, USB OTG HS/FS, 17 TIMs, 3 ADCs, 20 comm. interfaces

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STM32F446XC Datasheet, PDF (23/202 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 512kB Flash/128+4KB RAM, USB OTG HS/FS, 17 TIMs, 3 ADCs, 20 comm. interfaces

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STM32F446xC/E

Functional overview

Figure 5. VDDUSB connected to an external independent power supply

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3.16

3.16.1

3.16.2

Power supply supervisor

Internal reset ON

On packages embedding the PDR_ON pin, the power supply supervisor is enabled by

holding PDR_ON high. On the other package, the power supply supervisor is always

enabled.

The device has an integrated power-on reset (POR)/ power-down reset (PDR) circuitry

coupled with a Brownout reset (BOR) circuitry. At power-on, POR/PDR is always active and

ensures proper operation starting from 1.8 V. After the 1.8 V POR threshold level is

reached, the option byte loading process starts, either to confirm or modify default BOR

thresholds, or to disable BOR permanently. Three BOR thresholds are available through

option bytes. The device remains in reset mode when VDD is below a specified threshold,

VPOR/PDR or VBOR, without the need for an external reset circuit.

The device also features an embedded programmable voltage detector (PVD) that monitors

the VDD/VDDA power supply and compares it to the VPVD threshold. An interrupt can be

generated when VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA is

higher than the VPVD threshold. The interrupt service routine can then generate a warning

message and/or put the MCU into a safe state. The PVD is enabled by software.

Internal reset OFF

This feature is available only on packages featuring the PDR_ON pin. The internal power-on

reset (POR) / power-down reset (PDR) circuitry is disabled through the PDR_ON pin.

An external power supply supervisor should monitor VDD and should maintain the device in

reset mode as long as VDD is below a specified threshold. PDR_ON should be connected to

VSS, to allows device to operate down to 1.7v. Refer to Figure 6: Power supply supervisor

interconnection with internal reset OFF.

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