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ST72325XXX Datasheet, PDF (205/243 Pages) STMicroelectronics – SCI asynchronous serial interface
ST72325xxx-Auto
Electrical characteristics
Table 126. ESD absolute maximum ratings
Symbol
Ratings
Conditions
Max. value(1) Unit
VESD(HBM)
Electrostatic discharge voltage
(Human Body Model)
VESD(MM)
Electrostatic discharge voltage
(Machine Model)
TA  +25°C
2000
V
200
1. Data based on characterization results, not tested in production.
Static and dynamic latch-up
● LU: Three complementary static tests are required on 10 parts to assess the latch-up
performance. A supply overvoltage (applied to each power supply pin) and a current
injection (applied to each input, output and configurable I/O pin) are performed on each
sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details,
refer to the application note AN1181.
● DLU: Electrostatic discharges (one positive then one negative test) are applied to each
pin of three samples when the micro is running to assess the latch-up performance in
) dynamic mode. Power supplies are set to the typical values, the oscillator is connected
t(s as near as possible to the pins of the micro and the component is put in reset mode.
This test conforms to the IEC1000-4-2 and SAEJ1752/3 standards. For more details,
c refer to the application note AN1181.
rodu Table 127. Electrical sensitivities
P Symbol
Parameter
Conditions
Class(1)
te TA  +25°C
A
le LU
Static latch-up class
TA  +85°C
A
o TA  +125°C
A
bs DLU
Dynamic latch-up class VDD = 5.5V, fOSC = 4 MHz, TA = +25°C
A
O 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the
- JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B
Obsolete Product(s) Class strictly covers all the JEDEC criteria (international standard).
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