LPS25H Datasheet, PDF (19/45 Pages) STMicroelectronics – Embedded temperature compensation

LPS25H
Digital interfaces
bit 1: MS bit. When 0 do not increment the address, when 1 increment the address in
multiple writings.
bit 2 -7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DI(7:0) (write mode). This is the data that is written in the device (MSb first).
bit 16-...: data DI(...-8). Further data in multiple byte writings.
Figure 10. Multiple bytes SPI write protocol (2 bytes example)
CS
SPC
SDI
RW
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0 DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8
MS AD5 AD4 AD3 AD2 AD1 AD0
5.3.3
SPI read in 3-wires mode
A 3-wires mode is entered by setting to ‘1’ bit SIM (SPI serial interface mode selection) in
CTRL_REG1.
Figure 11. SPI read protocol in 3-wires mode
CS
SPC
SDI/O
RW
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
MS AD5 AD4 AD3 AD2 AD1 AD0
The SPI read command is performed with 16 clock pulses:
bit 0: READ bit. The value is 1.
bit 1: MS bit. When 0, do not increment the address, when 1, increment the address in
multiple readings.
bit 2-7: address AD(5:0). This is the address field of the indexed register.
bit 8-15: data DO(7:0) (read mode). This is the data that is read from the device (MSb first).
Multiple read command is also available in 3-wires mode.
DocID023722 Rev 5
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