LPS25H Datasheet, PDF (14/45 Pages) STMicroelectronics – Embedded temperature compensation

Digital interfaces
5
Digital interfaces
LPS25H
5.1
I²C serial interface
The registers embedded in the LPS25H may be accessed through both the I²C and SPI
serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I²C interface, CS
line must be tied high (i.e. connected to Vdd_IO).
Pin name
CS
SCL/SPC
SDA
SDI
SDI/SDO
SDO
SAO
Table 8. Serial interface pin description
Pin description
SPI enable
I²C/SPI mode selection (1: I²C mode; 0: SPI enabled)
I²C serial clock (SCL)
SPI serial port clock (SPC)
I²C serial data (SDA)
4-wire SPI serial data input (SDI)
3-wire serial data input /output (SDI/SDO)
SPI serial data output (SDO)
I²C less significant bit of the device address (SA0)
5.2
I²C serial interface (CS=High)
The LPS25H I²C is a bus slave. The I²C is employed to write data into registers whose
content can also be read back.
The relevant I²C terminology is given in Table 9.
Term
Transmitter
Receiver
Master
Slave
Table 9. Serial interface pin description
Description
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
There are two signals associated with the I²C bus: the serial clock line (SCL) and the serial
data line (SDA). The latter is a bi-directional line used for sending and receiving the data
to/from the interface. Both lines have to be connected to Vdd_IO through pull-up resistors.
The I²C interface is compliant with fast mode (400 kHz) I²C standards as well as with the
normal mode.
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