STM32F722XX Datasheet, PDF (179/229 Pages) –

STM32F722xx STM32F723xx
Electrical characteristics
Table 94. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings⁽¹⁾
Symbol
Parameter
Min
Max
Unit
t_w(NE)
t_{v(NOE_NE)}
t_w(NOE)
t_{h(NE_NOE)}
t_{v(A_NE)}
t_{h(A_NOE)}
t_{v(BL_NE)}
t_{h(BL_NOE)}
t_{su(Data_NE)}
t_{su(Data_NOE)}
t_{h(Data_NOE)}
t_{h(Data_NE)}
t_{v(NADV_NE)}
t_w(NADV)
1. C_L = 30 pF.
FMC_NE low time
FMC_NEx low to FMC_NOE low
FMC_NOE low time
FMC_NOE high to FMC_NE high hold time
FMC_NEx low to FMC_A valid
Address hold time after FMC_NOE high
FMC_NEx low to FMC_BL valid
FMC_BL hold time after FMC_NOE high
Data to FMC_NEx high setup time
Data to FMC_NOEx high setup time
Data hold time after FMC_NOE high
Data hold time after FMC_NEx high
FMC_NEx low to FMC_NADV low
FMC_NADV low time
2Thclk -1
0
2Thclk -1
0
-
0
-
0
Thclk -1.5
Thclk -1.5
0
0
-
-
2Thclk +1
0.5
2Thclk +1
-
0.5
-
0.5
ns
-
-
-
-
-
0
Thclk -0.5
Table 95. Asynchronous non-multiplexed SRAM/PSRAM/NOR read - NWAIT timings⁽¹⁾
Symbol
Parameter
Min
Max
Unit
t_w(NE)
FMC_NE low time
7Thclk +1 7Thclk +1
t_w(NOE)
t_w(NWAIT)
FMC_NWE low time
FMC_NWAIT low time
5Thclk -1 5Thclk +1
ns
Thclk -0.5
-
t_{su(NWAIT_NE)} FMC_NWAIT valid before FMC_NEx high
5Thclk +1.5
-
t_{h(NE_NWAIT)} FMC_NEx hold time after FMC_NWAIT invalid 4Thclk +1
-
1. Guaranteed by characterization results.
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