STM32F413XG Datasheet, PDF (163/207 Pages) STMicroelectronics – ARM-Cortex-M4 32b MCU+FPU, 125 DMIPS, up to 1.5MB Flash, 320KB RAM, USB OTG FS, 1 ADC, 2 DACs, 2 DFSDMs

STM32F413xG/H
Electrical characteristics
Table 91. Asynchronous multiplexed PSRAM/NOR read timings⁽¹⁾⁽²⁾
Symbol
Parameter
Min
Max
t_w(NE)
t_{v(NOE_NE)}
t_w(NOE)
t_{h(NE_NOE)}
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold
time
t_{v(A_NE)}
t_{v(NADV_NE)}
t_w(NADV)
t_{h(AD_NADV)}
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD(address) valid hold time after
FSMC_NADV high)
t_{h(A_NOE)}
t_{h(BL_NOE)}
t_{v(BL_NE)}
t_{su(Data_NE)}
t_{su(Data_NOE)}
t_{h(Data_NE)}
t_{h(Data_NOE)}
Address hold time after FSMC_NOE high
FSMC_BL time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
Data to FSMC_NEx high setup time
Data to FSMC_NOE high setup time
Data hold time after FSMC_NEx high
Data hold time after FSMC_NOE high
1. C_L = 30 pF.
2. Based on characterization.
3 * t_HCLK - 1
2 * t_HCLK
t_HCLK - 1
3 * t_HCLK + 1
2 * t_HCLK + 0.5
t_HCLK + 1
0
-
-
0
t_HCLK - 0.5
t_HCLK + 0.5
t_HCLK - 0.5
0
-
t_HCLK - 2
t_HCLK - 2
0
0
0.5
0.5
t_HCLK + 1
-
-
-
0.5
-
-
-
-
Unit
ns
Table 92. Asynchronous multiplexed PSRAM/NOR read-NWAIT timings⁽¹⁾⁽²⁾
Symbol
Parameter
Min
Max
Unit
t_w(NE)
FSMC_NE low time
8 * t_HCLK - 1
8 * t_HCLK + 1
t_w(NOE)
FSMC_NWE low time
5 * t_HCLK - 1.5 5 * t_HCLK + 0.5
ns
t_{su(NWAIT_NE)}
FSMC_NWAIT valid before FSMC_NEx
high
5 * t_HCLK + 1.5
-
t_{h(NE_NWAIT)}
FSMC_NEx hold time after
FSMC_NWAIT invalid
4 * t_HCLK + 1
-
1. C_L = 30 pF.
2. Based on characterization.
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