STM32F437XX Datasheet, PDF (142/240 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 225DMIPS, up to 2MB Flash/256+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 comm. interfaces, camera&LCD-TFT

Electrical characteristics
STM32F437xx and STM32F439xx
6.3.19
6.3.20
TIM timer characteristics
The parameters given in Table 60 are guaranteed by design.
Refer to Section 6.3.17: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
Table 60. TIMx characteristics⁽¹⁾⁽²⁾
Symbol
Parameter
Conditions⁽³⁾
Min
Max
Unit
AHB/APBx prescaler=1
or 2 or 4, f_TIMxCLK =
1
t_res(TIM) Timer resolution time
180 MHz
AHB/APBx prescaler>4,
f_TIMxCLK = 90 MHz
1
f_EXT
Timer external clock
frequency on CH1 to CH4 _{fTIMxCLK = 180 MHz}
0
Res_TIM Timer resolution
-
t_{MAX_COUNT}
Maximum possible count
with 32-bit counter
-
-
t_TIMxCLK
-
t_TIMxCLK
f_TIMxCLK/2
MHz
16/32
65536 ×
65536
bit
t_TIMxCLK
1. TIMx is used as a general term to refer to the TIM1 to TIM12 timers.
2. Guaranteed by design.
3. The maximum timer frequency on APB1 or APB2 is up to 180 MHz, by setting the TIMPRE bit in the
RCC_DCKCFGR register, if APBx prescaler is 1 or 2 or 4, then TIMxCLK = HCKL, otherwise TIMxCLK =
4x PCLKx.
Communications interfaces
I²C interface characteristics
The I²C interface meets the timings requirements of the I²C-bus specification and user
manual rev. 03 for:
• Standard-mode (Sm): with a bit rate up to 100 kbit/s
• Fast-mode (Fm): with a bit rate up to 400 kbit/s.
The I²C timings requirements are guaranteed by design when the I2C peripheral is properly
configured (refer to RM0090 reference manual).
The SDA and SCL I/O requirements are met with the following restrictions: the SDA and
SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS
connected between the
Section 6.3.17: I/O port
I/O pin and V_DD is
characteristics for
disabled, but is
more details on
still
the
present. Refer to
I²C I/O characteristics.
All I²C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog
filter characteristics:
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