WARP11 Datasheet, PDF (14/19 Pages) STMicroelectronics – WEIGHT ASSOCIATIVE RULE PROCESSOR

W.A.R.P.1.1
On-line Phase Timing (Output Generation) Working Frequency 40MHz
MCLK
S TB
NP
EP
start of
com putation
TCO M P
O0-O9
la st output da ta
d ata output
storag e
d ata output
storag e
TCO M P
e nd of
c o m putation
DATA OUT 1
TC O M P
DATA OUT 2
d ata output
storag e
NEW DATA
ACQUI SITION
TCO M P
DATA OUT n-1
OCNT0-3 la st output number
OUT NUM 1
OUT NUM 2
OUT NUM n-1
T_{comp= 600 ns (first proce s s , pipeline empty), 310 ns (next proce s s es ) for a configuration with 16 inputs, 8 outputs, 28 rules}
Ela ps ed time from the first data acquisition to the first output: 810 ns for the first cycle , 525ns for the other ones .
Timing Table Description: ON-LINE phase
2^nd step:Elaboration
- MCLK [INPUT] must be connectedwith the external synchronization signal.
- OFL [INPUT] must remain low during this phase.
- NP [OUTPUT] remains high during this phase.
- EP [OUTPUT] is set high during this phase.
- STB [OUTPUT] is set high for a clock period every time an output value has been calculated. It informs
that it is possible to utilize the output which is situated in the output bus (O0-O9). The STB pulse starts at
the rising edge of the MCLK and stops at the next rising edge of the MCLK. At the falling edge of the STB
the data situated on the O0-O9 bus can be stored.
- The current output on the O0-O9 [OUTPUT] bus is provided exactly when the STB signal rises and it
does not change until a new STB signal occurs.
- The output identifier on the OCNT0-OCNT3 [OUTPUT] bus is provided exactly when the STB signal rises
and it does not change until a new STB signal occurs.
- NP [OUTPUT] is set low when the penultimate STROBE is disabled allowing a new acquisition phase to
start while W.A.R.P. is still elaborating the last output.
- When the last output has been provided, EP will be automatically set low.
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