EF6805U3 Datasheet, PDF (14/31 Pages) STMicroelectronics – 8-BIT MICROCOMPUTER UNIT

EF6805U3
Figure 17 : Typical Frequency Selection for resistor (oscillator option).
INTERRUPTS
The microcomputers can be interrupted four diffe-
rent ways : through the external interrupt (INT) input
pin, the internal timer interrupt request, the external
port D bit 6 (INT2) input pin, or the software interrupt
instruction (SWI). When any interrupt occurs : the
current instruction (including SWI) is completed,
processing is suspended, the present CPU state is
pushed onto the stack, the interrupt bit (I) in the
condition code register is set, the address of the in-
terrupt routine is obtained from the appropriate in-
terrupt vector address, and the interrupt routine is
executed. Stacking the CPU register, setting the I
bit, and vector fetching require a total of 11 t_cyc pe-
riods for completion. A flowchart of the interrupt se-
quence is shown in figure 18. The interrupt service
routine must end with a return from interrupt (RTI)
instruction which allows the MCU to resume proces-
sing of the program prior to the interrupt (by uns-
tacking the previous CPU state). Unlike RESET,
hardware interrupts do not cause the current in-
struction execution to be halted, but are considered
pending until the current instruction execution is
complete.
When the current instruction is complete, the pro-
cessor checks all pending hardware interrupts and
if unmasked, proceeds with interrupt processing ;
otherwise the next instruction is fetched and execu-
ted. Note that masked interrupts are latched for later
interrupt service.
If both an external interrupt and a timer interrupt are
pending at the end of an instruction execution, the
external interrupt is serviced first. The SWI is exe-
cuted as any other instruction.
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