English
Language : 

STM8L052C6T6 Datasheet, PDF (1/102 Pages) STMicroelectronics – Value Line, 8-bit ultralow power MCU, 32-KB Flash, 256-byte data EEPROM, RTC, LCD, timers, USART, I2C, SPI, ADC
STM8L052C6
Value Line, 8-bit ultralow power MCU, 32-KB Flash,
256-byte data EEPROM, RTC, LCD, timers, USART, I2C, SPI, ADC
Datasheet − production data
Features
■ Operating conditions
– Operating power supply: 1.8 V to 3.6 V
– Temperature range: -40 °C to 85 °C
■ Low power features
– 5 low power modes: Wait, Low power run
(5.1 µA), Low power wait (3 µA), Active-halt
with full RTC (1.3 µA), Halt (350 nA)
– Consumption: 195 µA/MHz + 440 µA
– Ultra-low leakage per I/0: 50 nA
– Fast wakeup from Halt: 4.7 µs
■ Advanced STM8 core
– Harvard architecture and 3-stage pipeline
– Max freq. 16 MHz, 16 CISC MIPS peak
– Up to 40 external interrupt sources
■ Reset and supply management
– Low power, ultra-safe BOR reset with 5
selectable thresholds
– Ultra low power POR/PDR
– Programmable voltage detector (PVD)
■ Clock management
– 32 kHz and 1 to 16 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC
– Internal 38 kHz low consumption RC
– Clock security system
■ Low power RTC
– BCD calendar with alarm interrupt
– Auto-wakeup from Halt w/ periodic interrupt
■ LCD: up to 4x28 segments w/ step-up
converter
■ Memories
– 32 KB Flash program memory and
256 bytes data EEPROM with ECC, RWW
– Flexible write and read protection modes
– 2 Kbytes of RAM
LQFP48
■ DMA
– 4 channels supporting ADC, SPI, I2C,
USART, timers
– 1 channel for memory-to-memory
■ 12-bit ADC up to 1 Msps/25 channels
– Internal reference voltage
■ Timers
– Two 16-bit timers with 2 channels (used as
IC, OC, PWM), quadrature encoder
– One 16-bit advanced control timer with 3
channels, supporting motor control
– One 8-bit timer with 7-bit prescaler
– 2 watchdogs: 1 Window, 1 Independent
– Beeper timer with 1, 2 or 4 kHz frequencies
■ Communication interfaces
– Synchronous serial interface (SPI)
– Fast I2C 400 kHz SMBus and PMBus
– USART (ISO 7816 interface and IrDA)
■ Up to 41 I/Os, all mappable on interrupt vectors
■ Development support
– Fast on-chip programming and non-
intrusive debugging with SWIM
– Bootloader using USART
June 2012
This is information on a product in full production.
Doc ID 023331 Rev 1
1/102
www.st.com
1