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S75WS-N Datasheet, PDF (7/15 Pages) SPANSION – Stacked Multi-Chip Product (MCP)
Preliminary
3 Input/Output Descriptions
Table 3.1 identifies the input and output package connections provided on the device.
Symbol
Amax – A0
DQ15 - DQ0
OE#
WE#
VSS
NC
RDY
CLK
AVD#
F-RST#
F-WP#
F-ACC
R-CE#
F1-CE#
F2-CE#
F2-CE#
R-MRS#
F-VCC
R-VCC
R-UB#
R-LB#
Table 3.1 NOR Flash and RAM Input/Output Descriptions
Description
Address Inputs
Data Inputs/Outputs
Output Enable input
(Common)
Write Enable input
Ground
No Connect; not connected internally.
Ready output. Indicates the status of the Burst read.
(Flash)
Clock input. In burst mode, after the initial word is output, subsequent
active edges of CLK increment the internal address counter. Should be at (Common)
VIL or VIH while in asynchronous mode.
Address Valid input.
Indicates to device that the valid address is present on the address inputs.
Hardware reset input.
Hardware write protect input.
At VIL, disables program and erase functions in the four outermost sectors.
Should be at VIH for all other conditions.
Accelerated input.
At VHH, accelerates programming; automatically places device in unlock
bypass mode. At VIL, disables all program and erase functions. Should be
at VIH for all other conditions.
Chip-enable input for pSRAM
(Flash)
Chip-enable input for Code Flash.
Chip-enable input for Data Flash 1.
Chip-enable input for Data Flash 2.
Asynchronous relative to
CLK for Burst Mode.
Control Register Enable.
(pSRAM – RAM Type 4 only)
Flash 1.8 Volt-only single power supply.
pSRAM Power Supply.
Upper Byte Control.
Lower Byte Control .
(pSRAM)
Table 3.2 identifies the ORNAND input and output connections provided on the device.
Symbol
N-PRE
N-ALE
N-CLE
N-CE#
N-WP#
N-WE#
N-RE#
N-RY/BY#
N-I/O0-N-I/O15
N-VCC
Table 3.2 ORNAND Flash Input/Output Descriptions
Description
ORNAND Power-On Read Enable. Tie to VSS on customer board if not used.
ORNAND Address Latch Enable
ORNAND Command Latch Enable
ORNAND Chip-enable
ORNAND Write-protect
ORNAND Write-enable
ORNAND Read-enable
ORNAND Ready-Busy—this is shared with NOR RDY
ORNAND I/O signals (I/O0-I/O7 for x8 bus width)
ORNAND Power supply
October 6, 2005 S75WS-N_02_A2
S75WS-N Based MCPs
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