S29WS-P Datasheet, PDF (45/89 Pages) SPANSION – 512/256/128 Mb (32/16/8 M x 16 bit) 1.8 V Burst Simultaneous Read/Write MirrorBit Flash Memory

Data Sheet (Advance Information)
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any address in the
same bank, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the
program or erase operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. When the operation is complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately t_ASP [all sectors protected toggle time], then returns to reading array data. If not all selected
sectors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores the
selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alternatively, the system can use
DQ7 (see the subsection on DQ7: Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approximately t_PAP after the program
command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
Algorithm is complete.
See the following for additional information: Figure 7.6 on page 42, Figure 11.20 on page 73, and Table 7.35
on page 43 and Table 7.36 on page 45.
Toggle Bit I on DQ6 requires Read address to be relatched by toggling AVD# for each reading cycle.
DQ2: Toggle Bit II
The Toggle Bit II on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that
is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence. DQ2 toggles when the system
reads at addresses within those sectors that have been selected for erasure. But DQ2 cannot distinguish
whether the sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the
device is actively erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected for
erasure. Thus, both status bits are required for sector and mode information. Refer to Table 7.35 to compare
outputs for DQ2 and DQ6. See the following for additional information: Figure 7.6 on page 42, DQ6: Toggle
Bit I on page 43, and Figures 11.19–11.22.
Read address has to be relatched by toggling AVD# for each reading cycle.
Table 7.35 DQ6 and DQ2 Indications
If device is
programming,
actively erasing,
erase suspended,
programming in erase
suspend
and the system reads
at any address at the bank being
programmed
at an address within a sector selected
for erasure,
at an address within sectors not
selected for erasure,
at an address within a sector selected
for erasure,
at an address within sectors not
selected for erasure,
at any address at the bank being
programmed
then DQ6
toggles,
toggles,
toggles,
does not toggle,
returns array data,
toggles,
and DQ2
does not toggle.
also toggles.
does not toggle.
toggles.
returns array data. The system can read
from any sector not selected for erasure.
is not applicable.
November 8, 2006 S29WS-P_00_A7
S29WS-P
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