S25FL128SDPMFIG11 Datasheet, PDF (13/153 Pages) SPANSION – MirrorBit Flash Non-Volatile Memory CMOS 3.0 Volt Core with Versatile I/O Serial Peripheral Interface with Multi-I/O

Data Sheet
2.2 Migration Notes
2.2.1
Features Comparison
The S25FL128S and S25FL256S devices are command set and footprint compatible with prior generation
FL-K and FL-P families.
Table 2.1 FL Generations Comparison
Parameter
FL-K
FL-P
Technology Node
90 nm
90 nm
Architecture
Floating Gate
MirrorBit
Release Date
In Production
In Production
Density
4 Mb - 128 Mb
32 Mb - 256 Mb
Bus Width
x1, x2, x4
x1, x2, x4
Supply Voltage
2.7V - 3.6V
2.7V - 3.6V
Normal Read Speed (SDR)
6 MB/s (50 MHz)
5 MB/s (40 MHz)
Fast Read Speed (SDR)
13 MB/s (104 MHz)
13 MB/s (104 MHz)
Dual Read Speed (SDR)
26 MB/s (104 MHz)
20 MB/s (80 MHz)
Quad Read Speed (SDR)
52 MB/s (104 MHz)
40 MB/s (80 MHz)
Fast Read Speed (DDR)
-
-
Dual Read Speed (DDR)
-
-
Quad Read Speed (DDR)
-
-
Program Buffer Size
256B
256B
Erase Sector Size
4 kB / 32 kB / 64 kB
64 kB / 256 kB
Parameter Sector Size
4 kB
4 kB
Sector Erase Time (typ.)
30 ms (4 kB), 150 ms (64 kB)
500 ms (64 kB)
Page Programming Time (typ.)
700 µs (256B)
1500 µs (256B)
OTP
768B (3 x 256B)
506B
Advanced Sector Protection
No
No
Auto Boot Mode
No
No
Erase Suspend/Resume
Yes
No
Program Suspend/Resume
Operating Temperature
Yes
–40°C to +85°C
No
–40°C to +85°C / +105°C
Notes:
1. 256B program page option only for 128 Mb and 256 Mb density FL-S devices.
2. FL-P column indicates FL129P MIO SPI device (for 128 Mb density).
3. 64 kB sector erase option only for 128 Mb/256 Mb density FL-P and FL-S devices.
4. FL-K family devices can erase 4 kB sectors in groups of 32 kB or 64 kB.
5. Refer to individual data sheets for further details.
FL-S
65 nm
MirrorBit Eclipse
2H2011
128 Mb - 256 Mb
x1, x2, x4
2.7V - 3.6V / 1.65V - 3.6V V_IO
6 MB/s (50 MHz)
17 MB/s (133 MHz)
26 MB/s (104 MHz)
52 MB/s (104 MHz)
16 MB/s (66 MHz)
33 MB/s (66 MHz)
66 MB/s (66 MHz)
256B / 512B
64 kB / 256 kB
4 kB (option)
130 ms (64 kB), 520 ms (256 kB)
250 µs (256B), 340 µs (512B)
1024B
Yes
Yes
Yes
Yes
–40°C to +85°C / +105°C
2.2.2 Known Differences from Prior Generations
2.2.2.1
Error Reporting
Prior generation FL memories either do not have error status bits or do not set them if program or erase is
attempted on a protected sector. The FL-S family does have error reporting status bits for program and erase
operations. These can be set when there is an internal failure to program or erase or when there is an attempt
to program or erase a protected sector. In either case the program or erase operation did not complete as
requested by the command.
2.2.2.2
Secure Silicon Region (OTP)
The size and format (address map) of the One Time Program area is different from prior generations. The
method for protecting each portion of the OTP area is different. For additional details see Secure Silicon
Region (OTP) on page 66.
July 12, 2012 S25FL128S_256S_00_05
S25FL128S and S25FL256S
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