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S25FL128SDPMFIG11 Datasheet, PDF (120/153 Pages) SPANSION – MirrorBit Flash Non-Volatile Memory CMOS 3.0 Volt Core with Versatile I/O Serial Peripheral Interface with Multi-I/O
Data Sheet
Table 10.6 Commands Allowed During Program or Erase Suspend (Sheet 2 of 2)
Instruction
Name
PGSP
PP
4PP
PPBRD
QPP
4QPP
4READ
RDCR
DIOR
4DIOR
DOR
4DOR
DDRDIOR
4DDRDIOR
DDRQIOR
DDRQIOR4
QIOR
4QIOR
QOR
4QOR
RDSR1
RDSR2
READ
RESET
WREN
WRR
Instruction
Code
(Hex)
85
02
12
Allowed
During
Erase
Suspend
X
X
X
E2
X
32, 38
X
34
X
13
X
35
X
BB
X
BC
X
3B
X
3C
X
BD
X
BE
X
ED
X
EE
X
EB
X
EC
X
6B
X
6C
X
05
X
07
X
03
X
F0
X
06
X
01
X
Allowed
During
Program
Suspend
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Comment
Program suspend allowed during erase suspend.
Required for array program during erase suspend.
Required for array program during erase suspend.
Allowed for checking persistent protection before attempting a program
command during erase suspend.
Required for array program during erase suspend.
Required for array program during erase suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
All array reads allowed in suspend.
Needed to read WIP to determine end of suspend process.
Needed to read suspend status to determine whether the operation is
suspended or complete.
All array reads allowed in suspend.
Reset allowed anytime.
Required for program command within erase suspend.
Bank register may need to be changed during a suspend to reach a sector
needed for read or program. WRR is allowed when following BRAC.
10.7 One Time Program Array Commands
10.7.1
OTP Program (OTPP 42h)
The OTP Program command programs data in the One Time Program region, which is in a different address
space from the main array data. The OTP region is 1024 bytes so, the address bits from A23 to A10 must be
zero for this command. Refer to Section 8.4, OTP Address Space on page 56 for details on the OTP region.
The protocol of the OTP Program command is the same as the Page Program command. Before the OTP
Program command can be accepted by the device, a Write Enable (WREN) command must be issued and
decoded by the device, which sets the Write Enable Latch (WEL) in the Status Register to enable any write
operations.
To program the OTP array in bit granularity, the rest of the bits within a data byte can be set to 1.
Each region in the OTP memory space can be programmed one or more times, provided that the region is not
locked. Attempting to program zeros in a region that is locked will fail with the P_ERR bit in SR1 set to 1
Programming ones, even in a protected area does not cause an error and does not set P_ERR. Subsequent
OTP programming can be performed only on the un-programmed bits (that is, 1 data).
120
S25FL128S and S25FL256S
S25FL128S_256S_00_05 July 12, 2012