SCH3112 Datasheet, PDF (92/396 Pages) SMSC Corporation – LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
logic “1” all subsequent “software RESETS by the DOR and DSR registers will not change the
previously set parameters to their default values. All “hardware” RESET from the PCI_RESET# pin
will set the LOCK bit to logic “0” and return the EFIFO, FIFOTHR, and PRETRK to their default values.
A status byte is returned immediately after issuing a LOCK command. This byte reflects the value of
the LOCK bit set by the command byte.
Enhanced Dumpreg
The DUMPREG command is designed to support system run-time diagnostics and application software
development and debug. To accommodate the LOCK command and the enhanced PERPENDICULAR
MODE command the eighth byte of the DUMPREG command has been modified to contain the
additional data from these two commands.
COMPATIBILITY
The SCH311X was designed with software compatibility in mind. It is a fully backwards- compatible
solution with the older generation 765A/B disk controllers. The FDC also implements on-board
registers for compatibility with the PS/2, as well as PC/AT and PC/XT, floppy disk controller
subsystems. After a hardware reset of the FDC, all registers, functions and enhancements default to
a PC/AT, PS/2 or PS/2 Model 30 compatible operating mode, depending on how the IDENT and MFM
bits are configured by the system BIOS.
Rev 0.2 (09-28-04)
76
DATASHEET
SMSC SCH311X