SCH3112 Datasheet, PDF (289/396 Pages) SMSC Corporation – LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
Table 25.3 Configuration Register Summary (continued)
INDEX
0x2F
0x30
0x60
0x61
0x70
0x74
0xF0
0xF1
0xF2
0xF4
0xF5
TYPE
PCI
RESET
VCC POR VTR POR
SOFT
RESET
CONFIGURATION REGISTER
R/W
-
0x00
0x00
-
TEST 3
LOGICAL DEVICE 0 CONFIGURATION REGISTERS (FDD)
R/W
0x00
0x00
0x00
0x00
Activate
R/W
0x03
0x03
0x03
0x03
Primary Base I/O Address High
Byte
R/W
0xF0
0xF0
0xF0
0xF0
Primary Base I/O Address Low
Byte
R/W
0x06
0x06
0x06
0x06
Primary Interrupt Select
R/W
0x02
0x02
0x02
0x02
DMA Channel Select
R/W
0x0E
0x0E
0x0E
-
FDD Mode Register
R/W
0x00
0x00
0x00
-
FDD Option Register
R/W
0xFF
0xFF
0xFF
-
FDD Type Register
R/W
0x00
0x00
0x00
-
FDD0
R/W
0x00
0x00
0x00
-
FDD1
LOGICAL DEVICE 1 CONFIGURATION REGISTERS (RESERVED)
LOGICAL DEVICE 2 CONFIGURATION REGISTERS (RESERVED)
0x30
0x60
0x61
0x70
0x74
0xF0
0xF1
0x30
0x60
0x61
0x70
0xF0
LOGICAL DEVICE 3 CONFIGURATION REGISTERS (PARALLEL PORT)
R/W
0x00
0x00
0x00
0x00
Activate
R/W
0x00
0x00
0x00
0x00
Primary Base I/O Address High
Byte
R/W
0x00
0x00
0x00
0x00
Primary Base I/O Address Low
Byte
R/W
0x00
0x00
0x00
0x00
Primary Interrupt Select
R/W
0x04
0x04
0x04
0x04
DMA Channel Select
R/W
0x3C
0x3C
0x3C
-
Parallel Port Mode Register
R/W
0x00
0x00
0x00
-
Parallel Port Mode Register 2
LOGICAL DEVICE 4 CONFIGURATION REGISTERS (SERIAL PORT 1)
R/W
0x00
0x00
0x00
0x00
Activate Note 25.2
R/W
0x00
0x00
0x00
0x00
Primary Base I/O Address High
Byte
R/W
0x00
0x00
0x00
0x00
Primary Base I/O Address Low
Byte
R/W
0x00
0x00
0x00
0x00
Primary Interrupt Select
R/W
0x00
0x00
0x00
-
Serial Port 1 Mode Register
SMSC SCH311X
273
DATASHEET
Rev 0.2 (09-28-04)