SCH3112 Datasheet, PDF (329/396 Pages) SMSC Corporation – LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports

LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports
Datasheet
Table 26.3 Detailed Runtime Register Description (continued)
NAME
SMI_EN4
Default = 0x00
on VTR POR
THIS IS FOR THE
SCH3116 DEVICE
ONLY
REG
OFFSET
(HEX)
1B
(R/W)
MSC_STS
Default = 0x00
on VTR POR
1C
(R/W)
RESGEN
VTR POR
default = 00h
1Dh
(R/W)
Force Disk Change
Default = 0x03 on
VCC POR, PCI
Reset and VTR
POR
1E
(R/W)
DESCRIPTION
SCH3116 Device Only:
SMI Enable Register 4
This register is used to enable the different interrupt sources onto the group
nSMI output.
1=Enable
0=Disable
Bit[0] EN_U3INT
Bit[1] EN_U4INT
Bit[2] GP32
Bit[3] GP33
Bit[4] EN_U5INT
Bit[5] GP42
Bit[6] EN_U6INT
Bit[7] GP61
Miscellaneous Status Register
Bits[5:0] can be cleared by writing a 1 to their position (writing a 0 has no
effect).
Bit[0] Either Edge Triggered Interrupt Input 0 Status. This bit is set when
an edge occurs on the GP21 pin.
Bit[1] Either Edge Triggered Interrupt Input 1 Status. This bit is set when
an edge occurs on the GP22 pin.
Bit[2] Reserved
Bit[3] Reserved
Bit[4] Either Edge Triggered Interrupt Input 4 Status. This bit is set when
an edge occurs on the GP60 pin.
Bit[5] Either Edge Triggered Interrupt Input 5 Status. This bit is set when
an edge occurs on the GP61 pin.
Bit[7:6] Reserved. This bit always returns zero.
Reset Generator
Bit[0] WDT2_EN: Enable Watchdog timer Generation / Select
0= WDT Disabled - not source for PWRGD_OUT (Default)
1= WDT Enabled - Source for PWRGD_OUT
Bit[1] ThermTrip Source Select
0 = Thermtrip not source for PWRGD_OUT ((Default)
1 = Thermtrip source for PWRGD_OUT
Bit[2] WDT2_CTL: WDT input bit
Bit[7:3] Reserved
Force Disk Change
Bit[0] Force Disk Change for FDC0
0=Inactive
1=Active
Bit[1] Force Disk Change for FDC1
0=Inactive
1=Active
Force Change 0 and 1 can be written to 1 but are not clearable by
software.
Force Change 0 is cleared on nSTEP and nDS0
Force Change 1 is cleared on nSTEP and nDS1
DSKCHG (FDC DIR Register, Bit 7) = (nDS0 AND Force Change 0) OR
(nDS1 AND Force Change 1) OR nDSKCHG
Setting either of the Force Disk Change bits active ‘1’ forces the FDD
nDSKCHG input active when the appropriate drive has been selected.
Bit[7:2] Reserved
SMSC SCH311X
313
DATASHEET
Rev 0.2 (09-28-04)