EMC2112 Datasheet, PDF (54/65 Pages) SMSC Corporation – RPM-Based Linear Fan Controller with Hardware Thermal Shutdown

RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
Datasheet
When the FSC algorithm is enabled, Ramp Rate control is automatically used. When the FSC is not
active, then Ramp Rate control can be enabled by asserting the EN_RRC bit (see Section 6.19)
APPLICATION NOTE: The UPDATE bits and Fan Step Register settings operate independently of the RPM-based
Fan Speed Control Algorithm and will always limit the fan drive setting. That is, if the
programmed fan drive setting (either in determined by the RPM-based Fan Speed Control
Algorithm or by manual settings) exceeds the current fan drive setting by greater than the
Fan Step Register setting, the EMC2112 will limit the fan drive change to the value of the
Fan Step Register. It will use the Update Time to determine how often to update the drive
settings.
APPLICATION NOTE: If the Fan Speed Control Algorithm is used, the default settings in the Fan Configuration 2
Register will cause the maximum fan step settings to be ignored.
The Fan Step Registers are software locked.
6.23 Fan Minimum Drive Register
Table 6.39 Minimum Fan Drive Register
ADDR R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
48h
R/W Fan Minimum Drive 128
64
32
16
8
4
2
1
66h (40%)
6.24
The Fan Minimum Drive Register stores the minimum drive setting for each RPM-based Fan Speed
Control Algorithm. The RPM-based Fan Speed Control Algorithm will not drive the fan at a level lower
than the minimum drive unless the target Fan Speed is set at FFh (see Section 6.26)
During normal operation, if the fan stops for any reason (including low drive), the RPM-based Fan
Speed Control Algorithm will attempt to restart the fan. Setting the Fan Minimum Drive Registers to a
setting that will maintain fan operation is a useful way to avoid potential fan oscillations as the control
circuitry attempts to drive it at a level that cannot support fan operation.
The Fan Minimum Drive Register is software locked.
Valid TACH Count Register
Table 6.40 Valid TACH Count Register
ADDR R/W
REGISTER
B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT
49h R/W Valid TACH Count 4096 2048 1024 512 256 128 64 32
F5h
The Valid TACH Count Register stores the maximum TACH Reading Register value to indicate that
the each fan is spinning properly. The value is referenced at the end of the Spin Up Routine to
determine if the fan has started operating and decide if the device needs to retry. See Equation [3] for
translating the count to an RPM. This register is only used when the FSC is active.
If the TACH Reading Register value exceeds the Valid TACH Count Register (indicating that the Fan
RPM is below the threshold set by this count), then a stalled fan is detected. In this condition, the
algorithm will automatically begin its Spin Up Routine.
If a TACH Target setting is set above the Valid TACH Count setting, then that setting will be ignored
and the algorithm will use the current fan drive setting.
The Valid TACH Count Register is software locked.
Revision 0.88 (11-20-09)
54
DATASHEET
SMSC EMC2112