EMC2112 Datasheet, PDF (46/65 Pages) SMSC Corporation – RPM-Based Linear Fan Controller with Hardware Thermal Shutdown

6.13 Fan Status Register
RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
Datasheet
Table 6.20 Fan Status Register
ADDR R/W REGISTER
B7
B6
B5
B4
B3
27h
R-C
Fan Status
Register
WATCH
-
DRIVE_ FAN_
FAIL SHORT
-
B2
B1
B0
DEFAULT
-
FAN_
SPIN
FAN_
STALL
00h
The Fan Status Register contains the status bits associated with each fan driver. This register is
cleared when read if the error condition has been removed.
Bit 7 - WATCH - This bit is asserted ‘1’ if the Watchdog timer has expired (see Section 5.6).
Bit 5 - DRIVE_FAIL - Indicates that the RPM-based Fan Speed Control Algorithm cannot drive the Fan
to the desired target setting at maximum drive. This bit can be masked from asserting the ALERT pin.
„ ‘0’ - The RPM-based Fan Speed Control Algorithm can drive the Fan to the desired target setting.
„ ‘1’ - The RPM-based Fan Speed Control Algorithm cannot drive the Fan to the desired target setting
at maximum drive.
Bit 4- FAN_SHORT - This bit is asserted ‘1’ if the High Side Fan Driver detects an over current
condition that lasts for longer than 2 seconds.
Bit 1- FAN_SPIN- This bit is asserted ‘1’ if the Spin up Routine for the Fan cannot detect a valid
tachometer reading within its maximum time window. This bit can be masked from asserting the ALERT
pin.
Bit 0 - FAN_STALL - This bit is asserted ‘1’ if the tachometer measurement on the Fan detects a stalled
fan. This bit can be masked from asserting the ALERT pin.
6.14 Interrupt Enable Register
ADDR R/W REGISTER
B7
28
R/W
Interrupt
Enable
-
Table 6.21 Interrupt Enable Register
B6
B5
B4
B3
B2
B1
B0 DEFAULT
-
-
-
EXT3_ EXT2_ EXT1_ INT_
INT_EN INT_EN INT_EN INT_EN
00h
The Interrupt Enable Register controls the masking for each temperature channel. When a channel is
masked, it will not cause the ALERT pin to be asserted when an error condition is detected.
Bit 3 - EXT3_INT_EN - Allows the External Diode 3 channel to assert the ALERT pin. This bit can only
be set if the APD bit is set.
„ ‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 3 channel.
„ ‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 3
channel.
Bit 2 - EXT2_INT_EN - Allows the External Diode 2 channel to assert the ALERT pin.
„ ‘0’ (default) - The ALERT pin will not be asserted for any error condition associated with External
Diode 2 channel.
„ ‘1’ - The ALERT pin will be asserted for an error condition associated with External Diode 2
channel.
Revision 0.88 (11-20-09)
46
DATASHEET
SMSC EMC2112