EMC2112 Datasheet, PDF (42/65 Pages) SMSC Corporation – RPM-Based Linear Fan Controller with Hardware Thermal Shutdown

ADDR
1Bh
1Dh
R/W
R/W
once
R/W
once
RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
Datasheet
Table 6.13 Tcrit Limit Registers (continued)
REGISTER
B7
B6
B5
B4
External Diode
2 Tcrit Limit
Sign
64
32
16
Internal Diode
Tcrit Limit
Sign
64
32
16
B3
B2 B1 B0 DEFAULT
8
4
2
1
64h
(+100°C)
8
4
2
1
64h
(+100°C)
The Critical Temperature Limit Registers store the Critical Temperature Limit. At power up, none of the
respective channels are linked to Hardware set Thermal/Critical Shutdown circuitry.
Whenever one of the registers is updated, two things occur. First, the register is locked so that it cannot
be updated again without a power on reset. Second, the respective temperature channel is linked to
the SYS_SHDN pin and the Hardware set Thermal/Critical Shutdown Circuitry. At this point, if the
measured temperature channel exceeds the Critical limit, the SYS_SHDN pin will be asserted, the
appropriate bit set in the Tcrit Status Register, and the TCRIT bit in the Interrupt Status Register will
be set.
6.9
Configuration Register
ADDR
20h
Table 6.14 Configuration Register
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
R/W
Configuration MASK
WD_
EN
-
-
DR_ USE_ APD
-
EXT_ EXT_
CLK CLK
DEFAULT
00h
The Configuration Register controls the basic functionality of the EMC2112. The bits are described
below. The Configuration Register is software locked.
Bit 7 - MASK - Blocks the ALERT pin from being asserted.
„ ‘0’ (default) - The ALERT pin is unmasked. If any bit in either status register is set, the ALERT pins
will be asserted (unless individually masked via the Mask Register)
„ ‘1’ - The ALERT pin is masked and will not be asserted.
Bit 6 - WD_EN - Enables the Watchdog timer to operate in Continuous Mode (see Section 5.6.2).
„ ‘0’ (default) - The Watchdog timer does not operate continuously. It will function upon power up and
at no other time.
„ ‘1’ - The Watchdog timer operates continuously as described in Section 5.6.
Bit 2 - DR_EXT_CLK - Enables the internal tachometer clock to be driven out on the CLK pin so that
multiple devices can be synced to the same source.
„ ‘0’ (default) - The CLK pin acts as a clock input.
„ ‘1’ - The CLK pin acts as a clock output and is a push-pull driver.
Bit 1 - USE_EXT_CLK - Enables the EMC2112 to use a clock present on the CLK pin as the
tachometer clock. If the DR_EXT_CLK bit is set, then this bit is ignored and the device will use the
internal oscillator.
„ ‘0’ (default) - The EMC2112 will use its internal oscillator for all Tachometer measurements.
„ ‘1’ - The EMC2112 will use the oscillator presented on the CLK pin for all Tachometer
measurements.
Revision 0.88 (11-20-09)
42
DATASHEET
SMSC EMC2112