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SP6121CN-L Datasheet, PDF (35/42 Pages) Sipex Corporation – Low Voltage, Synchronous Step Down PWM Controller
Vin
7,8
+3.0V-7.0 V
R6
5.0
C1
2.2uF
U1
1 Vcc
PDRV 8
2 GND
NDRV 7
3 V FB
ISET 6
4 COMP ISENSE 5
S P6121
C2
56pF
R1
10K
C3
3.9nF
C5
1.0uF
C6
47uF
CERAMIC
U2
1 RESET NC 8
2 Reset PFO 7
3 MR
PFI 6
4 VCC
GND 5
C10
0.1uF
SP708
R5
10K
9
POWER OK
C11
56pF
Q1
R2
FDS6375
2.3K
L1 1.6uH
1,2,3,4
2.5V
D1
Q2
FDS6690A
R3
10K
R4
10K
10
TR IM
V out
C7
0.1uF
C8
470uF
C9
470uF
5,6
GND
FIGURE 3. SP6121 Demo Board Schematic.
Demo Board Component Selection
The input capacitor, C6, can be either a ceramic or tantalum capacitor. Its choice
depends on the user’s system input voltage transient. If the highest possible efficiency
is required, a ceramic 47uF capacitor is recommended.
The demo board circuit includes a Schottky Diode, D1, across the low side switch. It
prevents Q2’s internal body diode from turning on and dissipating power during the
nonoverlap time when both Q1 and Q2 are off. At a 500kHz switching frequency, these
losses would decrease overall efficiency by 0.5 – 0.6%.
The output voltage is set by the resistor divider: R3/R4. The output voltage is calculated
using the following:
VOUT
=
çæ
è
R3
R4
+ 1÷öVREF
ø
,
where VREF = 1.25V.
For the SP6121 demo board where VOUT = 2.5V. Choosing R4 equal to 10K, then
R3 = R4 = 10K
The considerations, tradeoffs and calculations required to select the power MOSFETs
(Q1, Q2), the inductor (L1), the input and output capacitors (C1, and C6, C8, and C9,
Rev 7/25/01
3