SP6121CN-L Datasheet, PDF (10/42 Pages) Sipex Corporation – Low Voltage, Synchronous Step Down PWM Controller

supplies are connected ‘live’ to low impedance
power sources. Certain tantalum capacitors, such
as AVX TPS series, are surge tested. For ge-
neric tantalum capacitors, use 2:1 voltage derat-
ing to protect the input capacitors from surge
fall-out.
MOSFET Selection
The SP6121 drives a PMOS MOSFET on the
high side and an NMOS MOSFET synchronous
rectifier on the low side. Using a PMOS switch
on the high side negates the need for an external
charge pump and simplifies the application cir-
cuit.
The losses associated with MOSFETs can be
divided into conduction and switching losses.
Conduction losses are related to the on resis-
tance of MOSFETs, and increase with the load
current. Switching losses occur on each on/off
transition when the MOSFETs experience both
high current and voltage. Since the bottom
MOSFET switches current from/to a paralleled
diode (either its own body diode or a Schottky
diode), the voltage across the MOSFET is no
more than 1V during switching transition. As a
result, its switching losses are negligible. The
switching losses are difficult to quantify due to
all the variables affecting turn on/off time. How-
ever, making the assumption that the turn on and
turn off transition times are equal, the transition
time can be approximated by:
where;
t_T = ^CISSVIN _,
I_G
C_ISS is the PMOS’s input capacitance, or the
sum of the gate-to-source capacitance, C_GS, and
the drain-to-gate capacitance, C_GD. This param-
eter can be directly obtained from the MOSFET’s
data sheet I_G is the gate drive current provided
by the SP6121 (approximately 1A at V_IN=5V)
and V_IN is the input supply voltage.
Therefore an approximate expression for the
switching losses associated with the high side
MOSFET can be given as:
P_SH(max) = (V_IN(max) + V_F)I_OUT(max)t_TF_S ,
where;
t_T = the switching transition time
V_F = free wheeling diode drop
APPLICATIONS INFORMATION
Switching losses need to be taken into account
for high switching frequency, since they are
directly proportional to switching frequency.
The conduction losses associated with top and
bottom MOSFETs are determined by
P_CH(max) = R_DS(ON)I_OUT(max)2D
P_CL(max) = R_DS(ON)I_OUT(max)2(1 - D),
where;
P_CH(max) = conduction losses of the high side
MOSFET
P_CL(max) = conduction losses of the low side
MOSFET
R_DS(ON) = drain to source on resistance.
The total power losses of the top MOSFET are
the sum of switching and conduction losses. For
synchronous buck converters of efficiency over
90%, allow no more than 4% power losses for
high or low side MOSFETs. For input voltages
of 3.3V and 5V, conduction losses often domi-
nate switching losses. Therefore, lowering the
R_DS(ON) of the MOSFETs always improves
efficiency even though it gives rise to higher
switching losses due to increased C_ISS .
Total gate charge is the charge required to turn
the MOSFETs on and off under the specified
operating conditions (V_GS and V_DS). The gate
charge is provided by the SP6121 gate drive
circuitry. (At 500kHz switching frequency, the
gate charge is the dominant source of power
dissipation in the SP6121.) At low output levels,
this power dissipation is noticeable as a reduc-
tion in efficiency. The average current required
to drive the high side and low side MOSFETs is:
I_G(av) = Q_GHF_S + Q_GLF_S,
where;
Q_GH = gate charge of PMOS
Q_GL = gate charge of NMOS
Considering that the gate charge current comes
from the input supply voltage VIN, the power
dissipated in the SP6121 due to the gate drive is:
P_{GATE DRIVE} = V_INI_G(av)
R_DS(ON) varies greatly with the gate driver volt-
age. The MOSFET vendors often specify R_DS(ON)
on multiple gate to source voltages (V_GS), as
Date: 11/29/04
SP6121 Low Voltage, Synchronous Step Down PWM Controller
10
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