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SP6120B Datasheet, PDF (10/22 Pages) Sipex Corporation – Low Voltage, AnyFETTM, Synchronous ,Buck Controller Ideal for 2A to 10A, High Performance, DC-DC Power Converters
As the figure shows, the SS voltage controls a
variety of signals. First, provided all the external
fault conditions are removed, the fault latch is reset
and the SS cap begins to charge. When the SS
voltage reaches around 0.3V, the error amp refer-
ence begins to track the SS voltage while maintain-
ing the 0.3V differential. As the SS voltage reaches
0.7V, the driver begins to switch the high side and
low side MOSFETs with narrow pulses in an
effort to keep the converter output regulated. As
the error amp reference ramps upward, the driver
pulses widen until a steady state value is reached.
The “bump” in the inductor current transfer curve
is indicative of excess charge current incurred due
to the finite propagation delay of the controller.
When the SS voltage reaches 2.0V, the second-
ary loop including the 3% window comparator
is enabled. Lastly, the SS voltage is clamped at
2.4V, ending the soft start charge cycle.
2.4V
2.0V
SS Voltage
0.7V
0.25V
0V
Error Amplifier
Reference
Voltage
1.25V
0V
ILOAD
Inductor Current
0V
V(VCC)
FAULT
Reset Voltage
0V
SWN
Voltage
V(VCC)
0V
V(VCC)
3% Low
Enable Voltage
0V
dVSS/dt = 50µA/CSS
VOUT = V(Eamp REF)* (1+RF/RI)
TIME
Hiccup Mode
When the converter enters a fault mode, the
driver holds the high side and low side MOSFETs
off for a finite period of time. Provided the part
is enabled, this time is set by the discharge of the
SS capacitor. The discharge time is roughly 10
times the charge interval thereby giving the
power supply plenty of time to cool during an
over current fault. The driver off-time is pre-
dominantly determined by the discharge time.
Restart will occur just like a normal soft start
cycle.
However, if a fault occurs during the soft start
charge cycle, the FAULT latch is immediately
set, turning off the high side and low side
MOSFETs. The MOSFETs remain off during
the remainder of the charge cycle and subse-
quent discharge cycle of the SS capacitor. Again,
provided there are no external fault conditions,
the FAULT latch will be reset when the SS
voltage reaches 250 mV.
Over Current Protection
The SP6120B over current protection scheme is
designed to take advantage of three popular
detection schemes: Sense Resistor, Trace Resis-
tor or Inductor Sense. Because the detection
threshold is only 43mV, both trace resistor and
inductor sense become attractive protection
schemes. The inductor sense scheme adds no
additional dc loss to the converter and is an
excellent alternative to Rdson based schemes;
43mV
V(ISP) - V(ISN)
0V
2.4V
2.0V
SS Voltage
250mV
0V
V(VCC)
FAULT Voltage
0V
Date: 5/25/04
SP6120B Low Voltage, AnyFETTM, Synchronous, Buck Controller
10
© Copyright 2004 Sipex Corporation