SI5350A-B Datasheet, PDF (9/29 Pages) Silicon Laboratories – FACTORY-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR

Si5350A-B
2.3. HCSL Compatible Outputs
The Si5350A can be configured to support HCSL compatible swing when the VDDO of the output pair of interest is
set to 2.5 V (i.e., VDDOA must be 2.5 V when using CLK0/1; VDDOB must be 2.5 V for CLK2/3 and so on).
The circuit in Figure 3 must be applied to each of the two clocks used, and one of the clocks in the pair must also
be inverted to generate a differential pair.
OSC
PLLA
PLLB
Multi
Synth
0
Multi
Synth
1
Z_O = 50 
R₁
0
511 
Z_O = 50 
240  _R2
R₁
HCSL
CLKIN
0
511 
240  _R2
Multi
Synth
N
Note: The complementary -180 degree
out of phase output clock is generated
using the INV function
Figure 3. Si5350A Output is HCSL Compatible
Rev. 1.0
9