SI5350A-B Datasheet, PDF (6/29 Pages) Silicon Laboratories – FACTORY-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR

Si5350A-B
Table 6. Output Characteristics (Continued)
(V_DD = 1.8 V ±5%, 2.5 V ±10%, or 3.3 V ±10%, T_A = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ Max Unit
Period Jitter^2,3
J_PER
20-QFN, 4 outputs running,
1 per VDDO
10-MSOP or 20-QFN,
all outputs running
—
40
95
ps pk-
pk
—
70 155
Cycle-to-Cycle Jitter^2,3
J_CC
20-QFN, 4 outputs running,
1 per VDDO
10-MSOP or 20-QFN,
all outputs running
—
50
90
ps pk
—
70 150
Notes:
1. Only two unique frequencies above 112.5 MHz can be simultaneously output.
2. Measured over 10k cycles. Jitter is only specified at the default high drive strength (50  output impedance).
3. Jitter is highly dependent on device frequency configuration. Specifications represent a “worst case, real world”
frequency plan; actual performance may be substantially better. Three-output 10MSOP package measured with clock
outputs of 74.25, 24.576, and 48 MHz. Eight-output 20QFN package measured with clock outputs of 33.33, 74.25, 27,
24.576, 22.5792, 28.322, 125, and 48 MHz.
Table 7. 25 MHz Crystal Requirements^1,2
Parameter
Symbol
Min
Typ
Max
Unit
Crystal Frequency
f_XTAL
—
25
—
MHz
Load Capacitance
C_L
6
—
12
pF
Equivalent Series Resistance
r_ESR
—
—
150

Crystal Max Drive Level
d_L
100
—
—
µW
Notes:
1. Crystals which require load capacitances of 6, 8, or 10 pF should use the device’s internal load capacitance for
optimum performance. See register 183 bits 7:6. A crystal with a 12 pF load capacitance requirement should use a
combination of the internal 10 pF load capacitance in addition to external 2 pF load capacitance (e.g., by using 4pF
capacitors on XA and XB).
2. Refer to “AN551: Crystal Selection Guide” for more details.
Table 8. 27 MHz Crystal Requirements^1,2
Parameter
Symbol
Min
Typ
Max
Unit
Crystal Frequency
Load Capacitance
Equivalent Series Resistance
Crystal Max Drive Level Spec
f_XTAL
C_L
r_ESR
d_L
—
27
—
MHz
6
—
12
pF
—
—
150

100
—
—
µW
Notes:
1. Crystals which require load capacitances of 6, 8, or 10 pF should use the device’s internal load capacitance for
optimum performance. See register 183 bits 7:6. A crystal with a 12 pF load capacitance requirement should use a
combination of the internal 10 pF load capacitance in addition to external 2 pF load capacitance (e.g., by using 4pF
capacitors on XA and XB).
2. Refer to “AN551: Crystal Selection Guide” for more details.
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Rev. 1.0