C8051F340_0608 Datasheet, PDF (9/288 Pages) Silicon Laboratories – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7
List of Figures
1. System Overview
Figure 1.1. C8051F340/1/4/5 Block Diagram ........................................................... 21
Figure 1.2. C8051F342/3/6/7 Block Diagram ........................................................... 22
Figure 1.3. On-Chip Clock and Reset ...................................................................... 24
Figure 1.4. On-Chip Memory Map for 64kB Devices (C8051F340/2/4/6) ................ 25
Figure 1.5. USB Controller Block Diagram............................................................... 26
Figure 1.6. Digital Crossbar Diagram ....................................................................... 28
Figure 1.7. PCA Block Diagram ............................................................................... 29
Figure 1.8. PCA Block Diagram ............................................................................... 29
Figure 1.9. 10-Bit ADC Block Diagram..................................................................... 30
Figure 1.10. Comparator0 Block Diagram ................................................................ 31
2. Absolute Maximum Ratings
3. Global DC Electrical Characteristics
4. Pinout and Package Definitions
Figure 4.1. TQFP-48 Pinout Diagram (Top View) .................................................... 39
Figure 4.2. TQFP-48 Package Diagram................................................................... 40
Figure 4.3. LQFP-32 Pinout Diagram (Top View) .................................................... 41
Figure 4.4. LQFP-32 Package Diagram ................................................................... 42
5. 10-Bit ADC (ADC0)
Figure 5.1. ADC0 Functional Block Diagram............................................................ 45
Figure 5.2. Temperature Sensor Transfer Function ................................................. 47
Figure 5.3. Temperature Sensor Error with 1-Point Calibration (VREF = 2.40 V).... 48
Figure 5.4. 10-Bit ADC Track and Conversion Example Timing .............................. 50
Figure 5.5. ADC0 Equivalent Input Circuits.............................................................. 51
Figure 5.6. ADC Window Compare Example: Right-Justified Single-Ended Data ... 58
Figure 5.7. ADC Window Compare Example: Left-Justified Single-Ended Data ..... 58
Figure 5.8. ADC Window Compare Example: Right-Justified Differential Data ....... 59
Figure 5.9. ADC Window Compare Example: Left-Justified Differential Data.......... 59
6. Voltage Reference
Figure 6.1. Voltage Reference Functional Block Diagram ....................................... 61
7. Comparators
Figure 7.1. Comparator Functional Block Diagram .................................................. 64
Figure 7.2. Comparator Hysteresis Plot ................................................................... 65
8. Voltage Regulator (REG0)
Figure 8.1. REG0 Configuration: USB Bus-Powered ............................................... 74
Figure 8.2. REG0 Configuration: USB Self-Powered ............................................... 74
Figure 8.3. REG0 Configuration: USB Self-Powered, Regulator Disabled .............. 75
Figure 8.4. REG0 Configuration: No USB Connection............................................. 75
9. CIP-51 Microcontroller
Figure 9.1. CIP-51 Block Diagram............................................................................ 77
Figure 9.2. Memory Map .......................................................................................... 83
10. Prefetch Engine
Rev. 1.0
9