C8051F340_0608 Datasheet, PDF (173/288 Pages) Silicon Laboratories – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7
USB Register
Name
IN1INT
OUT1INT
CMINT
IN1IE
OUT1IE
CMIE
FADDR
POWER
FRAMEL
FRAMEH
INDEX
CLKREC
FIFOn
E0CSR
EINCSRL
EINCSRH
EOUTCSRL
EOUTCSRH
E0CNT
EOUTCNTL
EOUTCNTH
Table 16.2. USB0 Controller Registers
USB Register
Address
0x02
0x04
0x06
0x07
0x09
0x0B
0x00
0x01
0x0C
0x0D
0x0E
0x0F
0x20–0x23
0x11
0x12
0x14
0x15
0x16
0x17
Description
Page Number
Interrupt Registers
Endpoint0 and Endpoints1-3 IN Interrupt Flags
181
Endpoints1-3 OUT Interrupt Flags
181
Common USB Interrupt Flags
182
Endpoint0 and Endpoints1-3 IN Interrupt Enables
183
Endpoints1-3 OUT Interrupt Enables
183
Common USB Interrupt Enables
184
Common Registers
Function Address
177
Power Management
179
Frame Number Low Byte
180
Frame Number High Byte
180
Endpoint Index Selection
173
Clock Recovery Control
174
Endpoints0-3 FIFOs
176
Indexed Registers
Endpoint0 Control / Status
187
Endpoint IN Control / Status Low Byte
190
Endpoint IN Control / Status High Byte
191
Endpoint OUT Control / Status Low Byte
193
Endpoint OUT Control / Status High Byte
194
Number of Received Bytes in Endpoint0 FIFO
188
Endpoint OUT Packet Count Low Byte
194
Endpoint OUT Packet Count High Byte
194
USB Register Definition 16.4. INDEX: USB0 Endpoint Index
R
R
R
R
R/W
R/W
R/W
R/W
Reset Value
-
-
-
-
EPSEL
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 USB Address:
0x0E
Bits7–4: Unused. Read = 0000b; Write = don’t care.
Bits3–0: EPSEL: Endpoint Select
These bits select which endpoint is targeted when indexed USB0 registers are accessed.
INDEX
0x0
0x1
0x2
0x3
0x4–0xF
Target Endpoint
0
1
2
3
Reserved
Rev. 1.0
173