C8051F340_0608 Datasheet, PDF (79/288 Pages) Silicon Laboratories – Full Speed USB Flash MCU Family

C8051F340/1/2/3/4/5/6/7
9.1.2. MOVX Instruction and Program Memory
The MOVX instruction is typically used to access external data memory (Note: the C8051F340/1/2/3/4/5/6/
7 does not support off-chip data or program memory). In the CIP-51, the MOVX write instruction is used to
accesses external RAM (XRAM) and the on-chip program memory space implemented as re-programma-
ble Flash memory. The Flash access feature provides a mechanism for the CIP-51 to update program
code and use the program memory space for non-volatile data storage. Refer to Section “12. Flash Mem-
ory” on page 113 for further details.
Mnemonic
ADD A, Rn
ADD A, direct
ADD A, @Ri
ADD A, #data
ADDC A, Rn
ADDC A, direct
ADDC A, @Ri
ADDC A, #data
SUBB A, Rn
SUBB A, direct
SUBB A, @Ri
SUBB A, #data
INC A
INC Rn
INC direct
INC @Ri
DEC A
DEC Rn
DEC direct
DEC @Ri
INC DPTR
MUL AB
DIV AB
DA A
ANL A, Rn
ANL A, direct
ANL A, @Ri
ANL A, #data
ANL direct, A
ANL direct, #data
ORL A, Rn
ORL A, direct
ORL A, @Ri
ORL A, #data
Table 9.1. CIP-51 Instruction Set Summary
Description
Arithmetic Operations
Add register to A
Add direct byte to A
Add indirect RAM to A
Add immediate to A
Add register to A with carry
Add direct byte to A with carry
Add indirect RAM to A with carry
Add immediate to A with carry
Subtract register from A with borrow
Subtract direct byte from A with borrow
Subtract indirect RAM from A with borrow
Subtract immediate from A with borrow
Increment A
Increment register
Increment direct byte
Increment indirect RAM
Decrement A
Decrement register
Decrement direct byte
Decrement indirect RAM
Increment Data Pointer
Multiply A and B
Divide A by B
Decimal adjust A
Logical Operations
AND Register to A
AND direct byte to A
AND indirect RAM to A
AND immediate to A
AND A to direct byte
AND immediate to direct byte
OR Register to A
OR direct byte to A
OR indirect RAM to A
OR immediate to A
Bytes
Clock
Cycles
1
1
2
2
1
2
2
2
1
1
2
2
1
2
2
2
1
1
2
2
1
2
2
2
1
1
1
1
2
2
1
2
1
1
1
1
2
2
1
2
1
1
1
4
1
8
1
1
1
1
2
2
1
2
2
2
2
2
3
3
1
1
2
2
1
2
2
2
Rev. 1.0
79