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SI514 Datasheet, PDF (6/36 Pages) Silicon Laboratories – ANY-FREQUENCY IC PROGRAMMABLE XO | |||
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Si514
Table 4. Output Clock Levels and Symmetry
VDD = 1.8 V ±5%, 2.5 or 3.3 V ±10%, TA = â40 to +85 oC
Parameter
Symbol
Test Condition
Min
CMOS Output Logic
VOH
High
0.85 x VDD
CMOS Output Logic
VOL
â
Low
CMOS Output Logic
IOH
3.3 V
â8
High Drive
2.5 V
â6
1.8 V
â4
CMOS Output Logic
IOL
3.3 V
8
Low Drive
2.5 V
6
1.8 V
4
CMOS Output
TR/TF
0.1 to 125 MHz,
â
Rise/Fall Time
CL = 15 pF
(20 to 80% VDD)
0.1 to 212.5 MHz,
â
CL = no load
LVPECL/HCSL Out-
TR/TF
â
put Rise/Fall Time
(20 to 80% VDD)
LVDS Output Rise/Fall TR/TF
â
Time (20 to 80% VDD)
LVPECL Output Com- VOC 50 ï to VDD â 2 V, single-ended
â
mon Mode
LVPECL Output Swing VO 50 ï to VDD â 2 V, single-ended 0.55
LVDS Output Common VOC
100 ï line-line, 3.3/2.5 V
1.13
Mode
100 ï line-line, 1.8 V
0.83
LVDS Output Swing
VO Single-ended 100 ïï differential
0.25
termination
HCSL Output
VOC
50 ïï to ground
0.35
Common Mode
HCSL Output Swing
VO
Single-ended
0.58
Duty Cycle
DC
48
Typ
â
â
â
â
â
â
â
â
0.8
0.6
â
â
VDD â
1.4 V
0.8
1.23
0.92
0.35
0.38
0.73
50
Max
Units
â
V
0.15 x VDD V
â
mA
â
mA
â
mA
â
mA
â
mA
â
mA
1.2
ns
0.9
ns
565
ps
800
â
0.90
1.33
1.00
0.45
0.42
0.85
52
ps
V
VPPSE
V
V
VPPSE
V
VPPSE
%
6
Rev. 1.0
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