SI514 Datasheet, PDF (25/36 Pages) Silicon Laboratories – ANY-FREQUENCY IC PROGRAMMABLE XO

Si514
4.3. I²C Interface
Configuration and operation of the Si514 is controlled by reading and writing to the RAM space using the I²C
interface. The device operates in slave mode with 7-bit addressing and can operate in Standard-Mode (100 kbps)
or Fast-Mode (400 kbps). Burst data transfer with auto address increments are also supported.
The I²C bus consists of a bidirectional serial data line (SDA) and a serial clock input (SCL). Both the SDA and SCL
pins must be connected to the VDD supply via an external pull-up as recommended by the I²C specification. The
Si514 7-bit I²C slave address is user-customized during the part number configuration process. See "5. Pin
Descriptions" on page 27 for more details.
Data is transferred MSB first in 8-bit words as specified by the I²C specification. A write command consists of a 7-
bit device (slave) address + a write bit, an 8-bit register address, and 8 bits of data as shown in Figure 5.
A write burst operation is also shown where every additional data word is written using an auto-incremented
address.
Write Operation – Single Byte
S Slv Addr [6:0] 0 A Reg Addr [7:0] A Data [7:0] A P
Write Operation - Burst (Auto Address Increment)
S Slv Addr [6:0] 0 A Reg Addr [7:0] A Data [7:0] A Data [7:0] A P
Reg Addr +1
From slave to master
From master to slave
1 – Read
0 – Write
A – Acknowledge (SDA LOW)
N – Not Acknowledge (SDA HIGH)
S – START condition
P – STOP condition
Figure 5. I²C Write Operation
A read operation is performed in two stages. A data write is used to set the register address, then a data read is
performed to retrieve the data from the set address. A read burst operation is also supported. This is shown in
Figure 6.
Rev. 1.0
25