CP2102N Datasheet, PDF (6/44 Pages) Silicon Laboratories – USBXpress Family

CP2102N Data Sheet
Typical Connection Diagrams
2.3 USB
The figure below shows a typical connection bus-powered diagram for the USB pins of the CP2102N devices including ESD protection
diodes on the USB pins.
USB
Connector
VBUS
D+
D-
Signal GND
VBUS
VREGIN
D+
D-
SP0503BAHT or
equivalent USB ESD
protection diodes
(Recommended)
GND
CP2102N Device
USB
Figure 2.5. Bus-Powered Connection Diagram for USB Pins
The figure below shows a typical connection self-powered diagram for the USB pins of the CP2102N devices including ESD protection
diodes on the USB pins.
Note: There are two relevant restrictions on the VBUS pin voltage in this self-powered configuration. The first is the absolute maximum
voltage on the VBUS pin, which is defined as VIO + 2.5 V in Table 3.10 Absolute Maximum Ratings on page 12. The second is the
Input High Voltage (VIH) for VBUS to detect when the device is connected to a bus, which is defined as VIO – 0.6 V in Table 3.7 GPIO
on page 10. For self-powered systems where VDD and VIO may be unpowered when VBUS is connected to 4.4 V to 5.5 V, a resistor
divider (or functionally-equivalent circuit) on VBUS is required to meet these specifications and ensure reliable device operation. In this
case, the current limitation of the resistor divider prevents high VBUS pin leakage current, even though the VIO + 2.5 V specification is
not strictly met.
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