CP2102N Datasheet, PDF (36/44 Pages) Silicon Laboratories – USBXpress Family

CP2102N Data Sheet
QFN24 Package Specifications
Dimension
Min
Max
Note:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask and the metal pad is to be 60 µm
minimum, all the way around the pad.
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
7. A 2 x 2 array of 0.9 mm square openings on a 1.2 mm pitch should be used for the center pad.
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body Components.
7.3 QFN24 Package Marking
PPPPPPPP
TTTTTT
YYWW #
Figure 7.3. QFN24 Package Marking
The package marking consists of:
• PPPPPPPP – The part number designation.
• TTTTTT – A trace or manufacturing code.
• YY – The last two digits of the assembly year.
• WW – The two-digit workweek when the device was assembled.
• # – Indicates the hardware revision.
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