CP2102N Datasheet, PDF (16/44 Pages) Silicon Laboratories – USBXpress Family

CP2102N Data Sheet
Functional Description
4.2.1 Baud Rate Generation
The baud rate generator is very flexible, allowing the user to request any baud rate in the range from 300 baud to 3 Mbaud. If the baud
rate cannot be directly generated from the 48 MHz oscillator, the device will choose the closest possible option. The actual baud rate is
dictated by the following equations.
Clock Divider =
48 MHz
2 × Prescale × Requested Baud Rate
Actual Baud Rate =
48 MHz
2 × Prescale × Clock Divider
In both cases, the Prescale value is 4 if the Requested Baud Rate is ≤ 365 baud and 1 if the Requested Baud Rate value is > 365
baud.
Most baud rates can be generated with an error of less than 1.0%. A general rule of thumb for the majority of UART applications is to
limit the baud rate error on both the transmitter and the receiver to no more than ±2%. The Clock Divider value is rounded to the near-
est integer, which may produce an error source. Another error source will be the 48 MHz oscillator, which is accurate to ±0.25%. Know-
ing the actual and requested baud rates, the total baud rate error can be found using the equation below.
( ) ^{Baud Rate Error (%) = 100 ×}
1–
Actual Baud Rate
Requested Baud Rate
± 0.25%
4.3 Additional Features
4.3.1 General Purpose Input/Outputs (GPIO)
The CP2102N has up to 7 GPIO that can be controlled from the host. By default and during reset, these pins are set to open-drain with
a weak pull-up enabled and the port latch set to 1. The pins can be made push-pull to drive external circuitry like LEDs. In addition, the
state of these pins can be configured during standard operation, during Suspend, and immediately following reset.
Note: All pins temporarily float high during a device reset. If this behavior is undesirable, a strong pull-down (10 kΩ) can be used to
ensure the pin remains low during reset.
The GPIO pins may also have alternate functions which are listed in the table below.
Table 4.2. GPIO Pin Alternate Functions
GPIO Pin
QFN28 Package
QFN24 Package
GPIO.0
TXT
TXT
GPIO.1
GPIO.2
GPIO.3
RXT
RS485
WAKEUP
RXT
RS485
WAKEUP
GPIO.4
No alternate function
Not available
GPIO.5
No alternate function
Not available
GPIO.6
No alternate function
Not available
Note:
1. On QFN28 and QFN24 packages, the CLK signal is available on the same pin as RI.
QFN20 Package
CLK¹
RS485
TXT
RXT
Not available
Not available
Not available
By default, all of the GPIO pins are configured as a GPIO input. The speed of reading and writing the GPIO pins is subject to the timing
of the USB bus. GPIO pins configured as inputs or outputs are not recommended for real-time signaling.
More information regarding the configuration of these pins can be found in Xpress Configurator in Simplicity Studio and AN721: CP21xx
Device Customization Guide. Guidance on GPIO usage can be found in AN223: Runtime GPIO Control for CP210x.
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