SI5350B-B Datasheet, PDF (5/32 Pages) Silicon Laboratories – FACTORY-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR

Si5350B-B
Table 4. AC Characteristics
(V_DD = 2.5 V ±10%, or 3.3 V ±10%, T_A = –40 to 85°C)
Parameter
Symbol
Test Condition
VCXO Control Voltage Range
Vc
VCXO Gain (configurable)
kv
VCXO Control Voltage Linearity KVL
VCXO Pull Range
(configurable)*
PR
VCXO Modulation Bandwidth
Vc = 10–90% of V_DD
Vc = 10–90% of V_DD
V_DD = 3.3 V
Vc = 10–90% of V_DD
Power-Up Time
Power-Up Time, PLL Bypass
Mode
Output Enable Time
Output Frequency Transition
Time
TRDY
TBYP
T_OE
T_FREQ
From V_DD = V_DDmin to valid
output clock, C_L = 5 pF,
f_CLKn > 1 MHz
From V_DD = V_DDmin to valid
output clock, C_L = 5 pF,
f_CLKn > 1 MHz
From OEB assertion to valid
clock output, C_L = 5 pF,
f_CLKn > 1 MHz
f_CLKn > 1 MHz
Spread Spectrum Frequency
Deviation
SS_DEV
Down spread. Selectable in
0.1% steps.
Spread Spectrum Modulation
Rate
SS_MOD
*Note: Contact Silicon Labs for VCXO operation at 2.5 V.
Min
0
18
–5
±30
—
—
—
—
—
–0.1
30
Typ
V_DD/2
—
—
0
10
2
0.5
—
—
—
31.5
Max
V_DD
150
+5
±240
—
10
1
10
10
–2.5
33
Unit
V
ppm/V
%
ppm
kHz
ms
ms
µs
µs
%
kHz
Table 5. Input Characteristics
(V_DD = 2.5 V ±10%, or 3.3 V ±10%, T_A = –40 to 85 °C)
Parameter
Symbol
Test Condition
Crystal Frequency
VC Input Resistance
f_XTAL
P0-P3 Input Low Voltage
P0-P3 Input High Voltage
V_{IL_P0-3}
V_{IH_P0-3}
Min
Typ
Max Units
25
—
27 MHz
100
—
—
k
–0.1
—
0.3 x V_DD ^V
0.7 x V_DD
—
3.60
V
Rev. 1.0
5