SI5350B-B Datasheet, PDF (11/32 Pages) Silicon Laboratories – FACTORY-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR

Si5350B-B
3. Functional Description
The Si5350B features a high-frequency PLL, a high-frequency VCXO and a high-resolution fractional MultiSynth^TM
divider on each output. A block diagram of both the 3-output and the 8-output clock generators are shown in
Figure 4. Free-running clocks are generated from the on-chip oscillator + PLL, and a separate voltage controlled
oscillator (VCXO) is used to generate synchronous clocks. A fixed-frequency non-pullable standard AT-cut crystal
provides frequency stability for both the internal oscillator and VCXO. The flexible synthesis architecture of the
Si5350B generates up to eight non-integer related frequencies and any combination of free-running and/or
synchronous clocks.
10-MSOP ^VDD
XA
PLL
OSC
XB
VCXO
VC
P0
Control
Logic
VDD
GND
XA
PLL
OSC
XB
VCXO
VC
P0
P1
Control
P2
Logic
P3
VDDO
MultiSynth 0
F1_0
R0
F2_0
FS
MultiSynth 1
F1_1
R1
F2_1
FS
MultiSynth 2
F1_2
R2
F2_2
FS
MultiSynth 3
CLK0
CLK1
CLK2
20-QFN
MultiSynth 0
F1_0
R0
F2_0
FS
MultiSynth 1
F1_1
R1
F2_1
FS
MultiSynth 2
F1_2
R2
F2_2
FS
MultiSynth 3
F1_3
R3
F2_3
FS
MultiSynth 4
F1_4
R4
F2_4
FS
MultiSynth 5
F1_5
R5
F2_5
FS
MultiSynth 6
F1_6
R6
MultiSynth 7
F1_7
R7
VDDOA
CLK0
CLK1
VDDOB
CLK2
CLK3
VDDOC
CLK4
CLK5
VDDOD
CLK6
CLK7
GND
Figure 4. Block Diagram of the 3 and 8 Output Si5350B Devices
Rev. 1.0
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