SI550 Datasheet, PDF (3/12 Pages) Silicon Laboratories – VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 MHZ TO 1.4 GHZ

Si550
Table 3. CLK± Output Frequency Characteristics
Parameter
Symbol Test Condition
Min
Typ
Max Units
Nominal Frequency^1,2,3
Temperature Stability^1,4
Absolute Pull Range^1,4
f_O
LVDS/CML/LVPECL
10
CMOS
10
—
945
MHz
—
160
∆f/f_O
T_A = –40 to +85 ºC
–20
—
+20
–50
—
+50
ppm
–100
—
+100
APR
±25
—
±150
ppm
Aging
Frequency drift over
—
15 year life.
—
±10
ppm
Power up Time⁵
t_OSC
—
—
10
ms
Notes:
1. See Section 3. "Ordering Information" on page 8 for further details.
2. Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz.
3. Nominal output frequency set by V_CNOM = 3/8 x V_DD.
4. Selectable parameter specified by part number.
5. Time from power up or tristate mode to f_O.
Table 4. CLK± Output Levels and Symmetry
Parameter
LVPECL Output Option¹
LVDS Output Option²
CML Output Option²
CMOS Output Option³
Rise/Fall time (20/80%)
Symbol
V_O
V_OD
V_SE
V_O
V_OD
V_O
V_OD
V_OH
V_OL
t_R, t_F
Test Condition
mid-level
swing (diff)
swing (single-ended)
mid-level
swing (diff)
mid-level
swing (diff)
I_OH = 32 mA
I_OL = 32 mA
LVPECL/LVDS/CML
CMOS with CL = 15 pF
Min
Typ
Max Units
V_DD – 1.42
1.1
0.5
1.125
—
—
—
1.20
V_DD – 1.25 V
1.9
V_PP
0.93
V_PP
1.275
V
0.32
0.40
0.50
V_PP
—
V_DD – 0.75
—
V
0.70
0.95
1.20
V_PP
0.8 x V_DD
—
—
—
V_DD
V
0.4
—
—
350
ps
—
1
—
ns
Preliminary Rev. 0.3
3