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EFM8BB3 Datasheet, PDF (28/70 Pages) Silicon Laboratories – The EFM8BB3 device family are fully integrated, mixed-signal system-on-a-chip MCUs. Highlighted features are listed below
4.2 Thermal Conditions
EFM8BB3 Data Sheet
Electrical Specifications
Table 4.16. Thermal Conditions
Parameter
Symbol Test Condition
Min
Typ
Max
Unit
Thermal Resistance
θJA
QFN24 Packages
QFN32 Packages
—
TBD
—
°C/W
—
TBD
—
°C/W
QFP32 Packages
—
80
—
°C/W
QSOP24 Packages
—
65
—
°C/W
Note:
1. Thermal resistance assumes a multi-layer PCB with any exposed pad soldered to a PCB pad.
4.3 Absolute Maximum Ratings
Stresses above those listed in Table 4.17 Absolute Maximum Ratings on page 27 may cause permanent damage to the device. This
is a stress rating only and functional operation of the devices at those or any other conditions above those indicated in the operation
listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. For
more information on the available quality and reliability data, see the Quality and Reliability Monitor Report at http://www.silabs.com/
support/quality/pages/default.aspx.
Table 4.17. Absolute Maximum Ratings
Parameter
Symbol Test Condition
Min
Max
Unit
Ambient Temperature Under Bias
TBIAS
-55
125
°C
Storage Temperature
TSTG
-65
150
°C
Voltage on VDD
VDD
GND-0.3
4.2
V
Voltage on VIO2
VIO
GND-0.3 VDD+0.3
V
Voltage on I/O pins or RSTb, excluding VIN
P2.0-P2.3 (QFN24 and QSOP24) or
P3.0-P3.3 (QFN32 and QFP32)
VIO > TBD V
VIO < TBD V
GND-0.3
TBD
V
GND-0.3
TBD
V
Voltage on P2.0-P2.3 (QFN24 and VIN
QSOP24) or P3.0-P3.3 (QFN32 and
QFP32)
GND-0.3 VDD+0.3
V
Total Current Sunk into Supply Pin
IVDD
—
400
mA
Total Current Sourced out of Ground IGND
Pin
400
—
mA
Current Sourced or Sunk by any I/O IIO
Pin or RSTb
-100
100
mA
Note:
1. Exposure to maximum rating conditions for extended periods may affect device reliability.
2. In certain package configurations, the VIO and VDD supplies are bonded to the same pin.
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