EFM8BB3 Datasheet, PDF (27/70 Pages) Silicon Laboratories – The EFM8BB3 device family are fully integrated, mixed-signal system-on-a-chip MCUs. Highlighted features are listed below

4.1.15 Port I/O
EFM8BB3 Data Sheet
Electrical Specifications
Table 4.15. Port I/O
Parameter
Symbol Test Condition
Min
Typ
Max
Unit
Output High Voltage (High Drive) V_OH
I_OH = -7 mA, V_IO ≥ 3.0 V
V_IO - 0.7
—
—
V
I_OH = -3.3 mA, 2.2 V ≤ V_IO < 3.0 V V_IO x 0.8
—
—
V
I_OH = -1.8 mA, 1.71 V ≤ V_IO < 2.2 V
Output Low Voltage (High Drive) V_OL
I_OL = 13.5 mA, V_IO ≥ 3.0 V
—
—
0.6
V
I_OL = 7 mA, 2.2 V ≤ V_IO < 3.0 V
—
—
V_IO x 0.2
V
I_OL = 3.6 mA, 1.71 V ≤ V_IO < 2.2 V
Output High Voltage (Low Drive) V_OH
I_OH = -4.75 mA, V_IO ≥ 3.0 V
V_IO - 0.7
—
—
V
I_OH = -2.25 mA, 2.2 V ≤ V_IO < 3.0 V V_IO x 0.8
—
—
V
I_OH = -1.2 mA, 1.71 V ≤ V_IO < 2.2 V
Output Low Voltage (Low Drive) V_OL
I_OL = 6.5 mA, V_IO ≥ 3.0 V
—
—
0.6
V
I_OL = 3.5 mA, 2.2 V ≤ V_IO < 3.0 V
—
—
V_IO x 0.2
V
I_OL = 1.8 mA, 1.71 V ≤ V_IO < 2.2 V
Input High Voltage
V_IH
0.7 x
—
—
V
V_IO
Input Low Voltage
V_IL
—
—
0.3 x
V
V_IO
Pin Capacitance
C_IO
—
7
—
pF
Weak Pull-Up Current
(V_IN = 0 V)
I_PU
V_DD = 3.6
-30
-20
-10
μA
Input Leakage (Pullups off or Ana- I_LK
log)
GND < V_IN < V_IO
TBD
—
TBD
μA
Input Leakage Current with V_IN
I_LK
above V_IO
V_IO < V_IN < V_IO+2.5 V
0
Any pin except P3.0, P3.1, P3.2, or
P3.3
5
150
μA
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