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EFM8BB3 Datasheet, PDF (20/70 Pages) Silicon Laboratories – The EFM8BB3 device family are fully integrated, mixed-signal system-on-a-chip MCUs. Highlighted features are listed below
4.1.9 ADC
Table 4.9. ADC
Parameter
Resolution
Throughput Rate
(High Speed Mode)
Throughput Rate
(Low Power Mode)
Tracking Time
Power-On Time
SAR Clock Frequency
Conversion Time1
Sample/Hold Capacitor
Input Pin Capacitance
Input Mux Impedance
Voltage Reference Range
Input Voltage Range2
Symbol
Nbits
fS
Test Condition
12 Bit Mode
10 Bit Mode
10 Bit Mode
fS
tTRK
tPWR
fSAR
tCNV
CSAR
CIN
RMUX
VREF
VIN
12 Bit Mode
10 Bit Mode
High Speed Mode
Low Power Mode
High Speed Mode
Low Power Mode
12-Bit Conversion,
SAR Clock =18 MHz,
System Clock = 49 MHz
10-Bit Conversion,
SAR Clock =18 MHz,
System Clock = 49 MHz
Gain = 1
Gain = 0.75
Gain = 0.5
Gain = 0.25
Gain = 1
Power Supply Rejection Ratio
DC Performance
Integral Nonlinearity
Differential Nonlinearity (Guaran-
teed Monotonic)
Offset Error
PSRRADC
INL
DNL
EOFF
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
12 Bit Mode
10 Bit Mode
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EFM8BB3 Data Sheet
Electrical Specifications
Min
Typ
Max
Unit
12
Bits
10
Bits
—
—
1.125
Msps
—
—
350
ksps
—
—
1.125
Msps
230
—
—
ns
450
—
—
ns
1.2
—
—
μs
—
—
18
MHz
—
—
TBD
MHz
0.7
μs
0.59
μs
—
5.2
—
pF
—
3.9
—
pF
—
2.6
—
pF
—
1.3
—
pF
—
20
—
pF
—
550
—
Ω
1
—
VIO
V
0
—
VREF /
V
Gain
—
TBD
—
dB
-1.9
-0.35 / 1
1.9
LSB
-0.6
±0.2
0.6
LSB
-0.9
±0.3
0.9
LSB
-0.5
±0.2
0.5
LSB
-2
0
2
LSB
-1
0
1
LSB
Preliminary Rev. 0.2 | 19