SI8660BA-B-IS1 Datasheet, PDF (26/40 Pages) Silicon Laboratories – LOW POWER SIX-CHANNEL DIGITAL ISOLATOR

Si8660/61/62/63
3.3. Layout Recommendations
To ensure safety in the end user application, high voltage circuits (i.e., circuits with >30 V_AC) must be physically
separated from the safety extra-low voltage circuits (SELV is a circuit with <30 V_AC) by a certain distance
(creepage/clearance). If a component, such as a digital isolator, straddles this isolation barrier, it must meet those
creepage/clearance requirements and also provide a sufficiently large high-voltage breakdown protection rating
(commonly referred to as working voltage protection). Table 5 on page 17 and Table 6 on page 18 detail the
working voltage and creepage/clearance capabilities of the Si86xx. These tables also detail the component
standards (UL1577, IEC60747, CSA 5A), which are readily accepted by certification bodies to provide proof for
end-system specifications requirements. Refer to the end-system specification (61010-1, 60950-1, 60601-1, etc.)
requirements before starting any design that uses a digital isolator.
3.3.1. Supply Bypass
The Si866x family requires a 0.1 µF bypass capacitor between V_DD1 and GND1 and V_DD2 and GND2. The
capacitor should be placed as close as possible to the package. To enhance the robustness of a design, the user
may also include resistors (50–300  ) in series with the inputs and outputs if the system is excessively noisy.
3.3.2. Output Pin Termination
The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination
of the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving
loads where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
3.4. Fail-Safe Operating Mode
Si86xx devices feature a selectable (by ordering option) mode whereby the default output state (when the input
supply is unpowered) can either be a logic high or logic low when the output supply is powered. See Table 12 on
page 24 and "5. Ordering Guide" on page 30 for more information.
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