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SI8660BA-B-IS1 Datasheet, PDF (12/40 Pages) Silicon Laboratories – LOW POWER SIX-CHANNEL DIGITAL ISOLATOR
Si8660/61/62/63
Table 3. Electrical Characteristics (Continued)
(VDD1 = 3.3 V ±10%, VDD2 = 3.3 V ±10%, TA = –40 to 125 °C)
Parameter
Symbol Test Condition
Min
Typ Max Unit
100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)
Si8660Bx, Ex
VDD1
VDD2
Si8661Bx, Ex
VDD1
VDD2
Si8662Bx, Ex
VDD1
VDD2
Si8663Bx, Ex
VDD1
VDD2
—
—
—
—
—
—
—
—
Timing Characteristics
5.0
7.0
mA
18.3 23.8
7.4
9.9
mA
16.4 21.3
10
13
mA
14.1 18.3
12.3 15.9
mA
12.3 15.9
Si866xBx, Ex
Maximum Data Rate
Minimum Pulse Width
0
—
150 Mbps
—
—
5.0
ns
Propagation Delay
Pulse Width Distortion
|tPLH - tPHL|
Propagation Delay Skew2
Channel-Channel Skew
All Models
tPHL, tPLH
PWD
tPSK(P-P)
tPSK
See Figure 1
See Figure 1
5.0
8.0
13
ns
—
0.2
4.5
ns
—
2.0
4.5
ns
—
0.4
2.5
ns
Output Rise Time
Output Fall Time
tr
CL = 15 pF
See Figure 1
tf
CL = 15 pF
See Figure 1
—
2.5
4.0
ns
—
2.5
4.0
ns
Peak Eye Diagram Jitter
tJIT(PK)
See Figure 7
—
350
—
ps
Common Mode Transient
Immunity
CMTI
VI = VDD or 0 V
35
VCM = 1500 V (see
Figure 2)
50
—
kV/µs
Startup Time3
tSU
—
15
40
µs
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of
the value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. Start-up time is the time period from the application of power to valid data at the output.
12
Rev. 1.5