SI88240ED-IS Datasheet, PDF (23/48 Pages) Silicon Laboratories – QUAD DIGITAL ISOLATORS WITH DC-DC CONVERTER

Si88x4x
2.3.11. High-Voltage Configuration
The high-voltage configuration is used for converting up to 24 V to 3.3 V or 5.0 V. All product options of the
Si884xx and Si886xx are intended for this configuration.
Si884xx and Si886xx can be used for dc-dc applications that have primary side voltage greater than 5.5 V. The dc-
dc converter uses the isolated flyback topology. With this topology, the switch and sense resistor are external,
allowing higher switching voltages. Digital isolator supply VDDA of the Si884xx and Si886xx require a supply less
than or equal to 5.5 V. If a suitable supply is not available on the primary side, the VREGA voltage reference with
external NPN transistor can supply VDDA. This eliminates the need to design an additional linear regulator circuit.
Like the Si882xx and Si883xx, the output voltage is sensed on the secondary side without requiring additional
optocouplers and support circuitry to bias those optocouplers. This allows the dc-dc to operate with superior line
and load regulation.
Figure 9 shows the block diagram of an Si886xx with external components. Si886xx is different from the
Si882xx/883xx as it has externally-controlled switching frequency and soft start. The dc-dc requires input capacitor
C2, transformer T1, switch Q1, sense resistor R4, rectifying diode D1 and an output capacitor C3. To supply VDDA,
Q2 transistor is biased and filtered by R3 and C1. External frequency and soft start behavior is set by CSS and
RFSW. Resistors R1 and R2 divide the output voltage to match the internal reference of the error amplifier. Type 1
loop compensation made by RCOMP and CCOMP are required at the COMP pin. Though it is not necessary for
normal operation, we recommend to use a snubber, to minimize high-frequency emissions. For further details, see
“AN901: Design Guide for Isolated DC-DC Using the Si884xx/886xx”.
Vin
Q₂
T₁
D₁
VOUT
C₂
C₃
R₃
C₁
Q₁
R4
Si8862x
VREGA
VDDA
VREG
Reference
UVLO
ESW
RSN
GNDP
FET
Driver
DC-DC Controller
Current
Sensing
VREG
Reference
UVLO
VREGB
VDDB
Used in applications
where converter
output is > 5.5 V
VSNS
R1
RFSW _{FC_SH}
SS
CSS
Freq. Control
and Shutdown
Soft Start
A1
Rev. Digital
Channel
A2
HF RX
HF TX
HF RX
Error Amp
and
Compensation
HF TX
HF RX
HF TX
Encoder
R2
COMP ^CCOMP
RCOMP
B1
Fwd. Digital
Channel
B2
Figure 9. Si88xx Block Diagram: 24 V Input to 5 V Output
Preliminary Rev. 0.6
23