SI88240ED-IS Datasheet, PDF (11/48 Pages) Silicon Laboratories – QUAD DIGITAL ISOLATORS WITH DC-DC CONVERTER

Si88x4x
Table 2. Electrical Characteristics¹ (Continued)
V_IN = 24 V; V_DDA = 4.3 V (see Figure 3) for all Si8844x/64x; V_DDA = V_DDP = 3.0 to 5.5 V (see Figure 2) for all Si8824x/34x;
T_A = –40 to 125 °C unless otherwise noted
Parameter
Symbol
Test Condition
Min Typ Max Unit
Minimum Pulse Width
10
—
—
ns
Propagation Delay
t_PHL
See Figure 1
— 17.8 —
ns
VDDx = 3.3 V
Propagation Delay
t_PLH
See Figure 1
— 14.5 —
ns
VDDx = 3.3 V
Propagation Delay
t_PHL
See Figure 1
— 17.5 —
ns
VDDx = 5.0 V
Propagation Delay
t_PLH
See Figure 1
— 12.6 —
ns
VDDx = 5.0 V
Pulse Width Distortion
|t_PLH – t_PHL|
Pulse Width Distortion
|t_PLH – t_PHL|
Propagation Delay Skew⁶
Channel-Channel Skew
Output Rise Time
PWD
PWD
t_PSK(P-P)
t_PSK
t_r
See Figure 1
VDDx = 3.3 V
See Figure 1
VDDx = 5.0 V
C_LOAD = 15 pF
—
3.4
—
ns
—
4.8
—
ns
—
2.0
—
ns
—
1.0
—
ns
—
2.5
—
ns
Output Fall Time
t_f
C_LOAD = 15 pF
—
2.5
—
ns
Common Mode
Transient Immunity
Startup Time⁷
CMTI
t_SU
V_I = VDDx or 0 V
V_CM = 1500 V
See Figure 4
40 100 — kV/µs
—
55
—
µs
Notes:
1. Over recommended operating conditions as noted in Table 1.
2. VOUT = VSNS x (1 + R1/R2) + R1 x I_offset
3. VDDP current needed for dc-dc circuits.
4. VDDA current needed for dc-dc circuits.
5. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
6. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
7. Start-up time is the time period from when the UVLO threshold is exceeded to valid data at the output.
Preliminary Rev. 0.6
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