EFM8BB2 Datasheet, PDF (22/55 Pages) Silicon Laboratories – The EFM8BB2 highlighted features are listed below

4.1.13 Port I/O
EFM8BB2 Data Sheet
Electrical Characteristics
Table 4.13. Port I/O
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Output High Voltage (High Drive) V_OH
I_OH = -7 mA, V_DD ≥ 3.0 V
V_DD - 0.7
—
—
V
I_OH = -3.3 mA, 2.2 V ≤ V_DD < 3.0 V V_DD x 0.8
—
—
V
Output Low Voltage (High Drive) V_OL
I_OL = 13.5 mA, V_DD ≥ 3.0 V
—
—
0.6
V
I_OL = 7 mA, 2.2 V ≤ V_DD < 3.0 V
—
—
V_DD x 0.2
V
Output High Voltage (Low Drive) V_OH
I_OH = -4.75 mA, V_DD ≥ 3.0 V
V_DD - 0.7
—
—
V
I_OH = -2.25 mA, 2.2 V ≤ V_DD < 3.0 V_DD x 0.8
—
—
V
V
Output Low Voltage (Low Drive) V_OL
I_OL = 6.5 mA, V_DD ≥ 3.0 V
—
—
0.6
V
I_OL = 3.5 mA, 2.2 V ≤ V_DD < 3.0 V
—
—
V_DD x 0.2
V
Input High Voltage
V_IH
V_DD - 0.6
—
—
V
Input Low Voltage
V_IL
—
—
0.6
V
Pin Capacitance
C_IO
—
7
—
pF
Weak Pull-Up Current
(V_IN = 0 V)
I_PU
V_DD = 3.6
-30
-20
-10
μA
Input Leakage (Pullups off or Ana- I_LK
log)
GND < V_IN < V_DD
-1.1
—
1.1
μA
Input Leakage Current with V_IN
I_LK
above V_DD
V_DD < V_IN < V_DD+2.0 V
0
5
150
μA
4.2 Thermal Conditions
Table 4.14. Thermal Conditions
Parameter
Symbol
Test Condition
Min
Typ
Thermal Resistance
θ_JA
QFN-20 Packages
QFN-28 Packages
─
60
─
26
QSOP-24 Packages
─
65
Note:
1. Thermal resistance assumes a multi-layer PCB with any exposed pad soldered to a PCB pad.
Max
Unit
─
°C/W
─
°C/W
─
°C/W
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